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freerisc8_11.zip
- 8位RISC CPU的VERILOG编程 SOURCECODE
sap1
- 這是用verilog寫的一個簡單的處理器,雖然只具有5個指令,但是可以透過這個範例,來了解到cpu的架構,與如何開發處理器,相信會有很大的啟發。-using Verilog This is a simple written by the processor, although with only five directives, through this example, to understand cpu architecture, how to develop processor, it w
mips
- mips verilog进行编写cpu,其中包括了若干的基本指令(use the verilog language to programme the CPU)
MCPU
- 多周期CPU的verilog代码,用vivado可以仿真出波形(multi-cycle CPU by verilog and using vivado to simulate.)
8051-master
- 设计兼容51的指令集的处理器架构 编写兼容51处理器的Verilog代码 仿真 验证测试处理器的功能和性能(The design includes a processor whose instruction set is compatible to the industrial standard 8051 and its FPGA implementation. Through the analysis of instructions, I determine the CPU inte
CPU
- 语言为verilog,平台是ISE,指令较少。32位MIPScpu,可以直接运行(The language is Verilog, the platform is ISE, and the instructions are fewer. 32 bit MIPScpu, can run directly)
cputop
- cpu简单开发,利用verilog实现。 并进行下板实验(CPU is simply developed and implemented with Verilog. And carry out the experiment of the lower plate)
minirisc-master
- Implementation of the MiniRisc CPU in Verilog!
RISC_CPU完整代码
- 硬件实现一个完整的CPU,利用verilog编写,可在ISE上直接使用(Hardware implements a full CPU)
spi_master
- SPI通信:串行flash的读写擦除命令通过SPI接口进行通信。? CPU芯片与FPGA通过SPI接口进行通信。? 其他功能集成电路芯片参数寄存器配置。例如DAC芯片内部有很多寄存器(因为芯片有很多功能,要通过设置寄存器不同的开关来打开或关闭相应的功能,一上电去初始化寄存器)需要我们去配置。FPGA一上电也是通过配置芯片里边来读取数据,然后配置FPGA内部的SRAM。FPGA是读取FLASH里边的串行数据,读取完校验完才配置到我们的FPGA的SRAM中去。速度比串口快,而且是同步传输。(Th
RISC_CPU
- 一个基于Verilog的cpu 转载于其他网站(A Verilog based CPU is reloaded on other websites)
risc_spm_v14
- 使用Altera CycloneIV 用Verilog语言实现一个精简指令集cpu(Using Altera CycloneIV to implement a streamlined instruction set CPU in Verilog language)
Single_cpu
- 单周期CPU自己课程大作业做的,亲测好用,verilog语言,适用vivado(Single cycle CPU course to do, pro - use, Verilog language, suitable for vivado)
Multi_cpu
- 多周期CPU自己课程大作业做的,亲测好用,verilog语言,适用vivado(Single cycle CPU course to do, pro - use, Verilog language, suitable for vivado)
OpenMIPS
- 《自己动手做CPU》书后源码 包含各章节实例 分节使用(source code of mips CPU)
multi_cpu
- 主要功能包含: // 1.按照CPU小系统规范要求,实现了各寄存器的读、写、控制等功能 // 2.实现了部分CPU读取配置字功能 // 3.实现了看门狗功能 // 4.实现了FLASH和BOOTROM控制功能 // 5.其它用户功能(按需进行添加)(The main functions include: According to the 1. / / CPU small system specifications, the realizatio
mips16
- 来自openhec平台,完整的mips16cpu设计。未添加工程,需自己手动建立工程添加文件,仅供参考。(mips16 cpu.no vivado project.It's just for teaching.If you want to learn more about it, please search for OpenHec.)
Code
- 提供了《自己动手写CPU》本书每一章涉及的OpenMIPS源代码、测试程序。(It provides the OpenMIPS source code and test program in each chapter, which is written in the book "do it yourself CPU".)
Verilog_Single_Cycle_CPU_check
- 用verilog写的一个单周期cpu,用于计组实验(A single cycle CPU written in Verilog for group experiment.)
基于Verilog的基础CPU
- 一个可以进行abs(a+b-c)的CPU,包含仿真代码,完全一步一步进行,具体到细节