搜索资源列表
ethernet_controller
- 以太网控制器MAC的verilog代码，已经过验证，可以用。-Ethernet Controller
ldpc_encoder_802_3an_latest.tar
- 适用于10GBase-T的以太网(802.3an协议)LDPC, VERILOG语言编写，可以应用在LATTICEXP2系列芯片上，基于Gallager算法。-LDPC encoder for 10GBase-T Ethernet (802.3an), based on Gallager s A algorithm
MACtop
- 基于FPGA的以太网控制器（MAC）源码，包括发送、接收、控制、CRC、寄存器、计数器等模块-Ethernet MAC sub-layer protocol
ethernet10-100M-IP-core
- 以太网10-100M IP核Verilog源码，可综合-Ethernet 10-100M IP core Verilog source code can be integrated
101259356ethernet
- etherent testbeanch by using verilog hdl
ethernet(MAC)verilog-langue
- 用veriolog编写以太网控制器（ＭＡＣ）-ｅｔｈｅｒｎｅｔ MAC of verilog
MAC_verilog
- 以太网MAC网卡的Verilog源代码，可以节省TCP/IP协议的设计开发时间。-Verilog source code for Ethernet MAC network card, you can save the TCP/IP protocol design and development time.
MII
- 以太网MII芯片配置接口的VHDL设计，配置PHY芯片的模块设计-Ethernet MII chip configuration interface VHDL design, configuration PHY chip module design
verilog-ip-core
- verilog ip核，源代码，ethernet， video_compression_systems-verilog ip core source code, ethernet, video_compression_systems
EtherNet
- 以太网控制器的FPGA实现,用Verilog语言编写!-Ethernet controller FPGA, Verilog language!
ethernet-verilog
- 非常详细的千兆以太网MAC verilog代码，可以供硬件设计时有关网络的开发参考-Very detailed Gigabit Ethernet MAC verilog code, can be used for hardware design of the network to develop a reference
ethernet.tar
- verilog写的以太网硬件模型，使用xilinx FPGA，ieee802.3ae-an ethernet model in Verilog，using a Xilinx FPGA，and the function：IEEE 802.3ae Media Access Control (MAC) Parameters, Physical Layers, and Management Parameters for 10 Gb/s Operation
Three-speed-Ethernet-Verilog-source
- Verilog的三速以太网源程序，文件中包含源程序和测试程序.-Three-speed Ethernet Verilog source
verilog-ethernet-master
- sivasankar is a good boy,,, njknsdjnjkgnjskn sjnkdnsgkjndjks jdskgnskdndgksj ksnklgnkl
10_100M-Ethernet-
- 10M 100M 以太网 Verilog 源代码-10M 100M Ethernet
FPGA IP cores
- FPGA IP cores on verilog for USB CY7C68013, VGA, Ethernet DM9000A, Sound WM8731.
ethernet
- opencore上实现以太网mac层的开发版Verilog代码，含英文设计文档与datasheet。可在Modelsim中编译与仿真。-Achieve opencore Ethernet mac layer development version of Verilog code, design documents containing English and datasheet. Can be compiled with the simulation in Modelsim.
ethernet
- 在xilinx用verilog实现工业以太网的全部文件-industrial ethernet in xilinx
CH03_RGMII_UDP_TEST
- 基于RGMII的UDP网络数据通信，学习FPGA的千兆以太网通信(RGMII based UDP network data communication, learning FPGA Gigabit Ethernet communications)
W5300_IF
- 实现FPGA与W5300 芯片的百兆以太网通信 ，实际项目中应用很多(Fast Ethernet communication between FPGA and W5300 chip, the actual project in many applications)