搜索资源列表
ethern
- 此代码是用Verilog实现的以太网接口,在此基础上做修改,可以作为一般的以太网接口程序开发.-this Verilog code is used to achieve the Ethernet interface, in this done on the basis of changes as a general Ethernet interface development.
Ethernet_verilog_ip_core
- Ethernet(以太网)verilog ip core用verilogHDL语言写的以太网软核，对学习verilog语言和以太网有很大帮助。
smii_latest.tar
- SMII接口的mac控制器，通过测试。使用verilog语言！-The Serial Media Independent Interface, SMMI, is a low pin count version of the MII normally used between ethernet MAC and PHY. The Serial Media Independent Interface (SMII) is designed to satisfy the following r
ethmac
- 以太网的verilog代码，来自opencores网站。-Ethernet verilog code from opencores site.
VHDL_MII_MAC
- 百兆以太网接口，verilog HDL,希望能对你有帮助。-verilog HDL， MII，ethernet，hope helpful to you。
ethernet_tri_mode
- 三速以太网接口模块verilog源码和测试-Triple-speed Ethernet interface module verilog source code and test
10_100m_ethernet-fifo
- 本源码源自于网络，采用verilog编写完成10M以太网到100M以太网的FIFO转化。-The source from the network, using verilog written 10M Ethernet 100M Ethernet FIFO conversion.
EEthhernet_vet
- Ethernet(以太网)verilog ip core用veriloggHDL语言写的以太网软核，对学习verilog语言与以太网有非常大帮助。 -Ethernet (Ethernet) Verilog the ip core with veriloggHDL language Ethernet soft-core, there is a very big help to learn verilog language and Ethernet.
tse_ref_design
- altera 三速以太网参考设计，verilog源码-Triple Speed Ethernet Data Path Reference Design
EMAC6
- verilog实现的FPGA三态以太网链路层通信代码，里面有状态机，并按各个模块的功能分了文件夹，还有说明文档，自定义帧的产生和接收，开发环境为Xilinx ISE，测试无误。-verilog realization FPGA Tri-Mode Ethernet link layer communication code, which the state machine, according to the function of each module sub folder, as well a
ethernet_test
- Verilog implementation of ethernet mac 100mbps test
ethmac10_100M
- 以太网IP Core 它实现10/100 Mbps的MAC控制器功能。它是在IEEE802.3和802.3u 标准下设计实现的。-The Ethernet IP Core is a 10/100 Media Access Controller (MAC). It consists of a synthesizable Verilog RTL core that provides all features necessary to implement the Layer 2 protocol of
8b10b
- 8b10b编解码，用于光通信和千兆以太网，verilog编写，已验证-8b10b codec for optical communications and Gigabit Ethernet, verilog prepared Verified
eth
- 用数字逻辑语言描述以太网，百兆以太网MAC和MII的verilog源码-With digital logic language to describe Ethernet
ethenete
- 基于verilog的三速以太网源程序，文件中包含源程序和测试程序。-tri_model ethernet source code based on vhdl languange, include source code and testbench in the file.
MAC_verilog
- 以太网的verilog代码实现，希望提供有所帮助-Ethernet verilog code, I hope to provide helpful
14_ethernet_test
- 千兆网学习代码 ISE，状态机实现数据打包，基于PHY芯片实现数据传输(ethernet communication sample with verilog,state machine)
ethernet_test
- ethernet 接口测试程序，，可以直接运行 调试通过！(ethernet verilog quarus 2)
tcp_ip_core_w_dhcp_latest.tar
- 以太网协议 TCP/IP/DHCP协议verilog实现(Ethernet IP/TCP/DHCP verilog source code)
ethernet_ip_verilog
- 以太网的ip,用verilog写的，包含testbench,用于FPGA以太网设计参考