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PS2_SOC2
- 利用Verilog HDL设计了PS2鼠标。 我们在Altera公司的Cyclone开发平台上测试了这个模块。正常动作，可以直接利用。-This is a state-machine driven serial-to-parallel and parallel-to-serial interface to the ps2 style mouse.
fsm
- 三段式状态机的典型写法，verilog实现-The three section type of typical state machine method, Verilog implementation
xvlijiance
- 附件包括四个内容1.采用Verilog编写的状态机实现序列检测的ISE工程2.代码文档一份3.原理说明4.使用说明。采用的软件平台是ISE13.3，硬件平台是Spartan-3E。-Accessories include four content of 1 by the state machine Verilog prepared realize sequence detection ISE works 2 code document a 3 principle that 4 instructi
ps2scan
- 采用VERILOG的CPLD编程，通过ps2接收键盘数据，然后把接收到的字母A到Z键值转换相应的ASII码，通过串口发送到PC机上。 -Using VERILOG CPLD programming, through the PS2 receive keyboard data, and then receive the letters A to Z key transformation corresponding ASII code, through the serial port to se
adc
- VERILOG编程，利用状态机实现对TLC549的采样控制，实验时可调节电位器RW1（在开发板底板左下角），改变ADC 的模拟量输入值，数据采集读取后在数码管上显示。 -Implementation of sampling control of TLC549 using state machine, adjustable potentiometer RW1 experiment (in the development board bottom left corner), change t
fpga4_123
- Verilog code for traffic light controller and vending machine
test-series-10010
- 用于检测序列10010的程序，Verilog的状态机练习-Used to test series 10010 program, Verilog state machine practice
autosell
- 自动售货机程序，以Verilog三段式描述方法描述有限状态机FSM，编译及输出正常-Vending machine program, describe the method described in Verilog three-finite state machine FSM, compile and output normal
tlc549adc
- 使用verilog编写的利用状态机实现对TLC549的采样控制，实验时可调节电位器，改变ADC 的模拟量输入值，数据采集读取后在数码管上显示。可以自己用万用表测一下输入电压， 然后与读取到的数据比较一下。-Use verilog prepared using the state machine to achieve the TLC549 sampling control, adjustable potentiometer experiment, change ADC The anal
Ex12_state_machine
- 状态转换机，verilog hdl语言编写-stata machine ,verilog hdl
quartus
- 流水灯状态机的一段式描述和二段式描述还有三段式描述的Verilog源码-Light water section of the state machine and the two-stage type descr iption descr iption descr iption of Verilog source code as well as three-
fsm
- verilog语言，有限状态机实现的序列检测器-verilog language, finite state machine sequence detector
RISC_CPU
- 这是用verilog写的一个基于状态机的简易RISC_CPU的设计，里面包含各个模块，每个模块经过仿真没有问题，整个工程在板子上经过试验。-This is a verilog to write a simple RISC_CPU based state machine design, which contains various modules, each module through simulation without problems, the whole project tested o
IIC_uart
- 本程序是用Verilog编写的，可实现IIC协议，同时联合串口uart通信，可实现pc机调试-The program is written in Verilog, enabling IIC protocol, while the United serial uart communications, enabling pc machine debugging
AD7606
- AD7606的状态机驱动，并口模式，verilog代码，可正常使用。-AD7606 state machine drive, verilog code, can be normal use.
traffic_control
- 使用verilog语言编写的双向交通信号控制灯程序，通过状态机转换实现车行道和人行道功能，以cyclone IV系列开发板做为应用平台。-Verilog language using two-way traffic signal control lights procedures, driveway and sidewalk functions via a state machine transition to cyclone IV Series development board as the
src
- verilog 通过串口控制VGA显示黑白机彩色棋盘 开发板是Xilinz RQ208-Color display in black and white machine control board through the serial port VGA Development Boards
VendingMac
- Verilog实现的自动售货机，使用有限状态机进行处理。包括Modelsim和Spnplify的综合工程。-Verilog realize vending machines, using a finite state machine for processing. Including integrated engineering and Spnplify of Modelsim.
zhuangtaiji
- verilog一个有趣的状态机事例，简单易懂。适用于初学者。是一个小游戏的，sparten板子可用。 内含测试。-Verilog an interesting state machine case, simple and easy to understand. Suitable for beginners. Is a small game, sparten board available. Inclusion test.
waterlights_fsm
- 采用Verilog语言，编写三段式状态机，实现流水灯操作，已测试验证通过-Using Verilog language, written in three-state machine to achieve water lights operating, it has been verified by test