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该程序是1602的verilog程序，该程序采用状态机编写-The program is 1602' s verilog program, the program prepared by the state machine
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采用状态机的方法实现移位寄存器，用Verilog HDL编写，已经通过验证。-The method uses the state machine implementation shift register, with write Verilog HDL has been verified.
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一个基于状态机的8位码流检测实现，Verilog语言，在ISE 10.1环境下编译通过。-A state machine-based 8-bit code stream detection to achieve, Verilog language, the ISE 10.1 environment compile.
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有限状态机，用Verilog语言，执行正确，仿真通过。-Finite state machine, with the Verilog language, the implementation of the right, simulation pass.
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verilog finite state machine
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VERILOG 多线程控制程序，实现状态机控制ad采集-VERILOG multi-threaded control program, to achieve a state machine control ad acquisition
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用Verilog HDL语言写一个交通控制灯的状态机。十字路口，红绿灯，带倒计时功能，也可以自行变换亮灯时间。-Verilog HDL language used to write a traffic control light state machine. Intersections, traffic lights, with the countdown function, you can also change their own light time.
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这个程序是用verilog语言编写的彩灯的小程序，使用状态机来实现，可以实现多种花型，有具体的程序！-This program is written in verilog small lantern, the use of state machine, you can achieve a variety of flowers, there are specific procedures!
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本程序使用verilog语言编写的出租车计价系统，实现时距并计！主要用状态机来实现！-This program uses the taxi meter verilog language system, and taking into account the time-distance! State machine is mainly used to achieve!
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本程序采用verilog语言编写实现仿真自动饮料机的功能，采用状态机来实现！-This procedure uses verilog language automatic beverage machine emulation capabilities, the use of state machine!
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This is verilog vending machine code. We can eat beverage and soda with only $1.25
This decribes all schematic and state diagram.
Ducksooyo~
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基于FPGA用VHDL编写的状态机控制步进电机.-Prepared by the state machine control VERILOG stepper motor.
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FPGA 状态机控制步进电机..verilog-FPGA state machine controlled stepper motor .. verilog
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一个用verilog 编写的流水灯程序，对于初学者比较有用，主要用于理解状态机转换。-Written in a flowing light with verilog program more useful for beginners, mainly for the understanding of the state machine transition.
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verilog实验的基本程序，包括状态机、数码管、流水灯、蜂鸣器、点阵、键盘等等，超详细的程序、适合初学者-verilog basic experimental procedures, including the state machine, digital control, water lights, buzzers, dot matrix, keyboard, etc., super detailed procedures, suitable for beginners
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用Verilog语言编写的车尾灯，用状态机来实现，3个LED显示左转，3个LED显示右转，6个灯显示刹车-Using Verilog language taillights, the state machine to achieve, three LED display left, three right LED display, six brake light display
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State Machine Design Techniques for Verilog and VHDL
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verilog 三段式状态机的写法，很好的Pdf-verilog three-state machine is written, a good Pdf
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Verilog 设计与验证源码+PDF，经典教程，对与RTL和状态机的理解有很大帮助，适合FPGA开发工程师。-Verilog design and verification source+ PDF, classic tutorial, and state machine understanding of RTL helps a lot, suitable for the FPGA development engineers.
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verilog fsm e book to understand verilog codes in finite state machine
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