搜索资源列表
cadence_orcad_capture______
- Cadence OrCAD Capture 中文培训教程 上海银利电子有限公司 -Cadence OrCAD Capture training course in Chinese Li Electronics Co., Ltd. Shanghai Bank
orcad-to-protel
- 将cadence画的PCB板图转化成PROTEL格式的小软件-orcad to protel
ncvlog
- Cadence公司的NC-Verilog® Simulator Help文档，内容很全面共1446页。-The Cadence® NC-Verilog® simulator is a Verilog digital logic simulator that combines the high-performance of native compiled code simulation with the accuracy, fl exibility, and
cadence
- candance 培训资料，专业IC设计培训资料-candance training materials, professional IC design training materials
verilog_a_modeling
- verilog-a 建模，在Cadence 中建立一个二级运放的VerilogA行为级模型，并进行建立时间等等仿真，以及对S/H电路的建模和仿真。 -verilog-a model in Cadence to create a secondary op amp VerilogA behavioral model and the simulation set-up time, etc., as well as S/H circuit modeling and simulation.
Cadence_SPB16.2
- Cadence SPB16.2中文教程，用于Cadence的学习-Cadence the SPB16.2 Chinese course, uses in Cadence the study
NCVerilog_tutorial-chinese
- linux下cadence nc_verilog工具使用教程，中文的，很详细，很适合学习-tool under linux cadence nc_verilog tutorials, Chinese, very detailed, very suitable for learning
New-Folder
- Cadence User Manual contents: Introduction to Cadence. Basic Features Schematic Edition and Circuit Simulation with Cadence DFWII and Spectre / Hspice,Affirma Schematic Edition and Simulation of an OTA Layout Edition and Verification using
allegro-Teardrop
- cadence硬件设计，泪滴的添加与删除-cadence hardware design, add and delete teardrop
Cadence-Encounter
- 8x8 mulitplier. created this file using the midelsim softwre. Tested and simulated. Great waveform, so the testbench is included also. Does anybody knkow how to make a 16x16 arrray multiplier?
labassignmentandcadenceppt
- A document on cadence
ConHDLFTB_15_5
- cadence 培训教程 关于布局布线，期间封装-cadence training
IMX28_EVK_REVD_SCH
- 飞思卡尔i.mx28开发板cadence格式原理图 包括最小系统、网口、声卡、液晶、USB等其他外围接口电路-Freescale i.mx28 cadence format development board schematics, including minimum system, LAN, sound card, LCD, USB and other peripheral interface circuit
uvm-1.0p1.tar
- Cadence 公司推出的高级验证语言，验证方法学开源-Cadence s introduction of an advanced verification languages, verification methodology open source
System_Demons
- 0.最简单的SystemC程序：hello, world. 1.用SystemC实现D触发器的例子，同时也演示了如何生成VCD波形文件。 2.用SystemC实现同步FIFO的例子。这个FIFO是从同文件夹的fifo.v（verilog代码）翻译过来的。 3.如何在SystemC中实现延时（类似verilog中的#time）的例子。 4.SystemC文档《User Guide》中的例子。注意和文挡中稍有不同的是修改了packet.h文件，重载了=和<<操作符。这其实
cadence_tutorial[1]
- cadence_tutorial[1] this file pdf is good guidance for learning CADENCE
spectre_mos[3]-(2)
- cadence_tutorial[2] chapter 2 cadence tutorial, useful text and pdf
Capture_training
- Cadence培训，EDA原理图开发工具-Capture training
sdram
- Cadence 高速PCB 的时序分析，SDRAM时序分析-The analysis of the succession of the PCB Cadence, SDRAM timing analysis
microelectronics
- 清华 微电子所 讲义 cadence 教程-cadence teaching materials