搜索资源列表
my_first_fpga
- 第一个FPGA程序的开发测试,用于DE1开发板的调试程序-The first FPGA development and testing program for debugging DE1 development board
FPGAREADWRITEFLASH
- FPGA对flash的读写控制,以在开发板上成功验证-To read and write flash of FPGA control, in order to successful validation on the development board
lcd
- Sparn3E 开发板,基于FPGA,实现板子上的LCD能够点亮,并且实现字符和 数字的显示-Sparn3E development board to achieve LED lights lit
S8_UART_V2
- 红色飓风开发板提供uart串口程序,verilog实现,一定可以参考并使用-FPGA uart verilog
OV7670_FPGA_DE2
- 基于Verilog语言的OV7670摄像头驱动,在DE2-115FPGA开发板上实现,显示还有点小问题-Based on Verilog language OV7670 camera driver, the DE2-115 implementation on fpga development board, shows that there are some small problems
FPGA-8253
- 本文就基于 FPGA微机与接口实验平台设计的问题,首先讲述了 核心板的设计。在 FPGA基础上,以可编程计数器 / 定时器 8253 和可编程并行控制器 8255为例,并介绍了 8255 和 8253 接口芯片,用 VHDL语言设计了8255 和 8253 的功能,最后在 ModelSim SE开发软件上实现了编译、调试、-In this paper, based on FPGA computer and interface experimental platform design issues
SOBLE_VGA
- SOBEL_VGA 黑金AX301开发板, 通过摄像头OV7670采集图像,通过FPGA进行边沿检测算法,最后通过VGA进行显示。-SOBEL_VGA u9ED1 u91D1AX301 u5F00 u53D1 u677F uFF0C u901A u8FC7 u6444 u50CF u5934OV7670 u91C7 u96C6 u56FE u50CF uFF0C u901A u8FC7FPGA u8FDB u884C u8FB9 u6CBF
pj2-NO.6
- 基于FPGA的电子密码锁设计-已在开发板上成功运行,通过老师检验。-FPGA based electronic password lock design- has been successfully developed on the development board, through the teacher inspection.
zhangnan11
- 一个基于FPGA的洗衣机正反转定时控制器,可以在开发板上实现控制和显示功能(A FPGA based washing machine is reverse timing controller, you can control and display functions on the development board)
三角函数的Verilog HDL语言实现
- 以Actel FPGA作为控制核心,通过自然采样法比较1个三角载波和3个相位差为1 200的正弦波,利用Verilog HDL语言实现死区时间可调的SPWM全数字算法,并在Fushion StartKit开发板上实现SPWM全数字算法。(With Actel FPGA as the control core, between 1 and 3 triangular carrier phase difference of 1200 sine wave by natural sampling, rea
Altera-verilog-I2C
- I2c verilog语言,在开发板上验证过的FPGA端代码程序;(Altera flatform, use verilog code i2c, test ok.)
Altera-verilog-LCD12864
- 使用Altera FPGA方案,用verilog编程语言,驱动LCD12864器件,在开发板已验证;(use altera fpga flatform, verilog language, driving LCD12864 device, test ok.)
Altera-verilog-StepMotor
- 使用Altera FPGA平台,Verilog编程语言,编写步进电机驱动程序,已在开发板上验证;(on altera fpga flatform, use verilog language, driving stepmotor, and test ok.)
pll_test
- PLL,即锁相环。是FPGA中的重要资源。由于一个复杂的FPGA系统往往需要多个不同频率,相位的时钟信号。所以,一个FPGA芯片中PLL的数量是衡量FPGA芯片能力的重要指标。FPGA的设计中,时钟系统的FPGA高速的设计极其重要,一个低抖动, 低延迟的系统时钟会增加FPGA设计的成功率。本例程调用Xilinx提供的PLL核来产生不同频率的时钟, 并把其中的一个时钟输出到FPGA外部IO上, 也就是开发板的SMA接口上。(PLL, pll. It's an important resource
usb_rd_buffer
- FPGA(SPARTAN6)通过USB协议与开发板上的USB芯片进行数据读写测试,在上位机上可以看到USB发来的数据,也可以通过修改VERILOG代码完成数据的接收(FPGA (SPARTAN6) can read and write data through the USB chip on the development board through the USB protocol. The data sent by USB can be seen on the host computer,
liushuideng
- Cyclone V开发实验板实现FPGA的8位流水灯(Cyclone V development of experimental board to realize 8 bit flow lamp of FPGA)
3-8译码器VHDL描述
- 在开发板FPGA:Spartan-3E 系列,型号:XC3S500E,封装:FGT320,速度-4;利用XIlinX编程,使用VHDL语言来描述组合逻辑器件3-8译码器(In the FPGA:Spartan-3E development board series, XC3S500E, FGT320, -4 package: speed; the use of XIlinX programming, using VHDL language to describe the combination
DE2_synthesizer
- 基于DE2FPGA开发板的多功能音乐合成器研究实现与综合(based on DE2 FPGA 2C35 development board design music synthesizer string base)
SRIO_4x_DSP2FPGA
- C6678开发板高速串口与FPGA之间的通信配置,应用程序(Communication Configuration between High Speed Serial Port of C6678 Development Board and FPGA, Application Program)
基于basys3的推箱子游戏
- 基于FPGA的游戏实例,开发板为Xilinx的basys3,VGA显示(Basys3, VGA Display of Xilinx Development Board Based on Game Example of FPGA)