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一种基于FPGA的并行流水线FIR滤波器结构
- 这是我看到的一些资料，希望与大家分享。也许这对您用处不大，但是我的一份诚意。-this is that I see some of the information and hope to share with you all. This may be less useful to you, but my sincerity.
FDAtool-design-fir-filter
- 基于FDAtool及FPGA的FIR滤波器设计-FDAtool design fir filter
32-order-FIR-on-FPGA
- 基于FPGA的32阶FIR滤波器设计，研究了一种采用FPGA实现数字滤波器硬件电路方案；讨论了窗函数的选择、滤波器的结构以及系数量化问题-32 order FIR filter design based on FPGA, an FPGA implementation digital filter hardware circuit program discussed the choice of the window function, the structure of the filter co
fir
- 基于FPGA的低通滤波器的设计，仿真环境是QuartusII9.0。对信号进行低通滤波，编程成功。希望对大家有所帮助-FPGA-based low-pass filter design, the simulation environment QuartusII9.0. The signal is low-pass filtering, the programming was successful. We hope to help
FIR
- 基于fpga的FIR滤波器设计,已通过modesim仿真结果正确,verilog编写-Fpga-based FIR filter design, has passed modesim simulation results are correct, verilog prepared
fir
- 该程序实现了一个FIR滤波加速器，该程序在FPGA板上开发，通过使用VHDL语言来定义RS232端口的使用-design a FIR Filter Accelerator based on FPGA board and RS232 interface using VHDL language.
fir_test
- 采用xilinx进行的FPGA的FIR滤波器设计-Conducted using xilinx FPGA FIR filter design
FPGA--FIR--bishe
- 一篇参考的毕业设计论文，做的是参数可调的数字滤波器。有详细的原理介绍，设计源程序及仿真流程与结果-A reference of the graduation design paper, adjustable parameters of digital filter. Have detailed introduces, the principle of the design source program and the simulation process and result
fir
- FIR滤波器的FPGA仿真与实现。欢迎分享，分享快乐。-The FPGA simulation and realization of the FIR filter.Welcome to share, share the happiness.
fir
- FIR滤波器的FPGA实现，串行移位算法，运行周期长但资源利用率低。-FIR filter FPGA, serial shift algorithm, but the long-running cycle of low resource utilization.
FIR
- FPGA设计在设计过程中使用ISE软件自带的IP核时，消耗资源太大的时候，需要自己编写滤波器的源代码，这里给出我们常用的串行FIR核的verilog语言代码设计文件，并通过作者时序仿真验证，并用于实际的项目中。-The FPGA design in the design process of ISE software used to own the IP core, consume resources is too big, need to write your own source code
Codigo-Filtro-FIR
- Filter FIR, HHDL code for FPGA, it is proved in simulation
fir-filter
- 基于Verilogfir 滤波器，含低通、带通-a fir filter base on FPGA verilog software
fir
- FIR滤波器的fpga设计，内容和代码十分完备-fpga design FIR filters, the content is complete
DIGITAL-SIGNAL-PROCESSING-WITH-FPGA
- 数字信号处理的FPGA实现最新版的源代码，涉及FFT变换、IIR、FIR数字滤波器等的verilog及vhdl代码-<digital signal processing with FPGA> (the latest version) . the source code involving FFT transform, IIR, FIR digital filters by verilog and vhdl.
Design--of-FIR-digital-filter
- 西北工大2006-基于FPGA的FIR数字滤波器的设计和实现-Design and implementation of FIR digital filter based on FPGA in Northwest China
数字信号处理的FPGA实现-第三版-verilog源程序
- 数字信号处理的FPGA实现, 包括了FPGA基础知识，浮点运算，信号处理的FIR FFT等，附录包含源代码(Digital signal processing FPGA implementation, including the basic knowledge of FPGA, floating point operations, signal processing FIR, FFT, etc., the appendix contains the source code)
xiaosong-fpga
- FIR数字滤波，亲自测试，都是源码，希望可以帮到大家，谢谢，谢谢！大家要好好学习呀，学习好VHDL(FIR digital filter, personally tested, are source code, and I hope to help you, thank you, thank you! We should study hard, good study, VHDL)
基于FPGA和IP核的FIR低通滤波器
- 用verilog语言实现数字电路低通滤波器(Implementation of digital circuit low-pass filter using Verilog language)
基于FPGA的音频驱动WM831+FIR滤波器
- 基于FPGA的音频驱动WM831+FIR滤波器