搜索资源列表
fft_ly
- 采用MATLAB实现定点的FFT运算，但是仿真硬件结构的IP核调用以及误差产生模式，用于仿真FPGA实现FFT运算的效果和误差来源。-FPGA to realize the company s 68013A paragraph Cypress USB chip used SLAVEFIFO read operation, the fixed-point implementation using MATLAB FFT operation, but the hardware structure of
Cordic_matlab
- 实现自然对数运算的cordic算法的matlab浮点仿真，以及针对FPGA硬件平台的定点仿真测试-Achieve natural logarithm of cordic algorithm matlab floating point emulation, and FPGA hardware platform for fixed-point simulation testing
ExpectedBoardDetails1.txt
- Use full for knowing board details while making projects on FPGA and matlab simulations
caculate_variance
- Verilog语言求解均方根的近似方法，用MATLAB仿真实现，思想可移植到FPGA中-Verilog language rms approximate solving method, using MATLAB simulation, ideas can be transplanted into the FPGA
fir_digital
- 本文对数字基带信号脉冲成型滤波的应用、原理及实现进行了研究。首先介绍了数字成型滤波的应用意义并分析了模拟和数字两种硬件实现方法，接着介绍了成形滤波器设计所需要MATLAB软件，以及利用ISE system generator在FPGA上进行滤波器实现的优势。文中给出了成形滤波函数的数学模型，讨论了几种常用成形滤波函数的传输特性以及对传输系统信号误码率的影响。然后介绍了本次设计中使用到的数字成形滤波器设计的几种FIR滤波器结构。把各种设计方案进行仿真，比较仿真结果，最后根据实际应用的情况并结合
_9b4ca76dcb513a53aa647a9ccf41ecb8
- 混沌的数值仿真主要包括MATLAB编程、SIMULINK模块构建、EWB仿真以及其他一些相关的软件仿真或数值计算等方法，从而获取混沌吸引子的相图、时域波形图、李氏指数、分叉图和功率谱等。混沌的硬件实验主要包括模拟/数字电路设计与硬件实验、现场可编程门阵列器件（FPGA）、数字信号处理器（DSP）等硬件实现方法来产生混沌信号。本节仅对各种数值仿真方法作简单介绍。-
ROM
- vhdl中的ROM程序，包括matlab表格程序，调用FPGA里的RAM实现ROM功能-The ROM vhdl procedures, including matlab spreadsheet program, call the FPGA to achieve ROM functions in the RAM
WirelessCommuncationFPGADesign(code)
- 无线通信FPGA设计的所有代码，包括Verilog和Matlab版本。-Verilog and matlab code of wireless communication on FPGA design.
svd_simple
- 介绍了一种简化的SVD分解算法，这个算法已在MATLAB上验证，可以用于fpga上实现-ntroduces a simplified SVD decomposition algorithm, this algorithm has been validated in MATLAB can be used to achieve the fpga
conv_encode
- 本设计是一个基于FPGA的咬尾卷积码编码器设计，要求使用verilog语言编写编码器模块，通过编译和综合，并通过matlab和modelsim仿真对比验证设计结果。-The design is an FPGA-based tail-biting convolutional code encoder design requires the use verilog language encoder module, through compilation and synthesis, and by c
fir_verilog_matlab
- 本设计是基于FPGA的一个FIR低通滤波器设计，要求使用Verilog语言编写滤波器模块，通过编译和综合，并通过Matlab和modelsim联合仿真验证设计结果。-This design is a FIR low-pass filter design based on FPGA, use Verilog to program filter module, and joint simulation by Matlab and modelsim to validate the design re
nn_last
- Neural Network with FPGA and VHDL codes + Matlab model
wuxian-tongxin-matlabaFPGA
- 无线通信的matlab与FPGA设计随书光盘，另外抄录了书中一些光盘中没有的程序代码，非常适合从事数字信号处理、数字滤波器设计、最佳接收机设计的人员学习。-CD attached with book named "design of wireless communication of matlab and the FPGA" , and write down some dodes in the book but not in the CD, very suitable for digital s
pseudo-sequence-vhdl
- 常用的几种伪随机序列的仿真及性能分析，进而运用组合序列的思想，尝试不同的序列以不同组合方式生成的新的伪随机序列，并用FPGA分析其性能，得出组合序列的一般的规律，借此推导出了一种新的组合序列——异族Gold组合序列。-Through simulation and performance analysis of several commonly use¬ d pseudo-random sequence in the FPGA environment, use the ideas of c
MATLABaFPGA
- 《数字通信同步技术的MATLAB与FPGA实现》配套程序-" Synchronous digital communication MATLAB and FPGA technology to achieve" matching program
ConvCodeXilinx
- This a convolutional encoder in xilinx virtex-5 ML506 board FPGA. This program use matlab for comunicating with FPGA. The convolutional encoder using rate 1/2, and 1/3.The register are 3,4,5,6 and 7.-This is a convolutional encoder in xilinx virtex-5
Projekt_FPGA
- Matlab descr iption to implement a FPGA Design
inc_pid
- 基于FPGA的增量式PID设计方法，Matlab、Simulink， Xilinx Block set-Incremental PID FPGA-based design methodology
DDS
- DDS的核心是相位累加器，相位累加器有一个累加器和相位寄存器组成，它的作用是再基准时钟源的作用下进行线性累加，当产生溢出时便完成一个周期，即DDS的一个频率周期。加载Matlab 产生的波形，通过FPGA输出DDS信号-Core DDS is the phase accumulator, a phase accumulator and phase accumulator registers, its role is to carry out a linear accumulation under
UPLOAD
- Matlab Assignment describing sampling,histogram,cdf,pdf,autocorrelation and crosscorelation,finding of mean and variance using matlab.It also contains FPGA tutorial of LED blinking project design and State Machine Design with their solutions.