搜索资源列表
Anti_binarization
- H.264的 CAVLC的反二进制化的verilog code-H.264 CAVLC anti-binary code of verilog
Verilog-HDL-intra_prediction
- 基于H.264的帧内预测中4×4块的9种预测方法的源程序-H.264 intra prediction based on 4 × 4 block prediction method of the source 9
H[mm.264
- 这是一个描述的文档，教你怎么写Verilog关于H264 的文章那个，考了非常受启发。-This is a descr iption of the document, teach you how to write Verilog that the article on the H264, the test is very enlightening.
DSP_h264_VariableBlockSize
- 這是用verilog HDL實現H.264可變block大小的源碼。為了使其能在FPGA上運作，還加入了我自己的改善。-A verilog HDL code for H.264 with variable block size and my own improvement.
mc_t
- 利用verilog实现H.264中半像素插值功能。30个周期完成一个4x4块儿的横向、纵向和斜向的插值。-Verilog implementation using H.264 in the half-pixel interpolation function. 30 cycles to complete a 4x4 pieces of horizontal, vertical and diagonal interpolation.
nova_latest
- h.264完整的解码器，用verilog实现，属于opencores-h.264 full decoder, implemented by verilog, one of opencores
nova
- 基于H.264 视频编解码 verilog 基于H.264 视频编解码 verilog-Verilog based on the H.264 video codec based on H.264 video codec Verilog
IQIT
- Inverse quantization and DCT for h.264 in verilog
H.264_verilog
- 这时H.264编码器的verilog源码，有需要的朋友下载-At this time download the the H.264 encoder Verilog source code, a friend in need
bluespec-h264_latest.tar
- H.264硬件视频解码，采用verilog代码设计，支持1.5M时钟下30bps的QCIF分辨率的实时视频解码-H. 264 hardware video decoder, use verilog code design, support under 1.5 M clock 30 BPS QCIF resolution of real-time video decoding
H.264_verilog
- 基于verilog的H.264视频压缩技术的源代码，包括verilog源代码，以及仿真波形文件，希望对大家有用-verilog h.264
CAVLE-h264
- 本压缩文件包含了h.264压缩算法中的CAVLE的编解码模块（Verilog和VHDL两个版本），包含有仿真的testbench测试文件，综合后可以直接使用-The compressed file contains the h.264 compression algorithm CAVLE codec module (Verilog and VHDL both versions), including a simulation testbench test file, can be used d
581371_H.264verilog
- H264编码 verilog vivado(H264encoder verilog vivado)