搜索资源列表
CPU
- 使用Verilog HDL语言完成一个简单的多周期MIPS微处理器的设计-Using Verilog HDL language to complete a simple multi-cycle MIPS microprocessor design
mips-atomic
- For TX49, operating only IE bit is not enough.
COA_PRO
- 简单MIPS流水线指令集的verilog实现。初步实现了branch 的功能。-implement of Pipelined MIPS processor
lab28
- 采用5级流水线MIPS微处理器设计，实现32位流水线的算数、逻辑、以为等指令-pipeline MIPS
t9input2
- t9输入法，在windows下开发的基于MIPS架构实现。-t9 input method, developed in the windows based on the MIPS architecture implementation.
PIPELINE
- （包含详细说明文档和简单汇编转机器码翻译器）五级流水线实现MIPS指令集（30条）含异常处理。结构采用多分支预测结构（基于历史的动态分支预测）-(Contains detailed documentation and compilation turn simple machine code translator) five pipelined MIPS instruction set (30) with exception handling. Structure using multi-bran
cp1emu
- a MIPS coprocessor 1 (FPU) instruction emulator.
minimips_latest.tar
- minimalistic mips core. you can load it to any fpga.
trap_emul
- KVM MIPS: Deliver Emulate exceptions to the guest kernel.
setup_tx4927
- TX4927 setup routines Based on linux arch mips txx9 rbtx4938 setup.c, and RBTX49xx patch CELF patch archive. -TX4927 setup routines Based on linux arch mips txx9 rbtx4938 setup.c, and RBTX49xx patch CELF patch archive.
spram
- MIPS SPRAM support for Linux v2.13.6.
Tiger
- 关于Tiger语言的编译器，进行了多种优化，生成mips代码完全正确-Compiler for Tiger with optimization
MIPS-architecture-vol-IIa.pdf
- MIPS32 Architecture Volume II pdf
irq_cpu
- This file define the irq handler for MIPS CPU interrupts.
s_4bri
- check for trapped MIPS 46xx CPU, dump exception frame.
sp_tint
- MIPS floating point support.
COMPAILER
- 用C++写的由扩充C0文法写成的编译为MIPS汇编的编译器，在MARS4.2上完美测试通过，支持递归、函数定义、函数调用、数组、四则运算、输入输出等，是我本科花了2个月写的大作业，也留给北航的学弟学妹参考。-Written by C++ grammar written by the expansion of C0 compiler for MIPS assembler compiler tested on MARS4.2 perfect support recursive function de
Project3-Logisim
- 用logisim写的单周期CPU，可以跑MIPS汇编编译的二进制代码，测试完美通过，供学弟学妹参考，计算机组成原理试验-Logisim write cycle with a single CPU, you can run the MIPS assembler binary code, test perfect pass for mentees reference, computer composition principle test
tlb
- Logic that manipulates the Xtensa MMU. Derived MIPS. -Logic that manipulates the Xtensa MMU. Derived MIPS.
project3
- 计算机组成原理 Logisim完成单周期处理器开发 支持指令集MIPS-Lite2-Principles of Computer Organization Logisim complete development support single-cycle instruction set processor MIPS-Lite2