搜索资源列表
RAM
- 采用ROM生成正弦波，然后写入宏模块RAM，再次读出来,含有modelsim仿真结果。-ROM sine RAM
FIFO
- 将ROM的正弦波数据输入FIFO存储器，然后输出，有modelsim仿真波形-Verilog FIFO ROM mif sine
Modelsim_How_to_use_pdf
- Modelsim的使用方法，适合新手学习，有详细的操作方法和例程-Modelsim to use, suitable for beginners to learn, detailed operating methods and routines
mux16
- 十六位乘法器的verilog hdl 实现 及 modelsim 仿真 环境为quartusii9.0 自动调用modelsim 6.5输出仿真结果-fpga verilog hdl modelsim quartusii 16-bit multiplier
gaus_filter
- This Gaussian filter is implemented by Verilog HDL and successfully simulated on ModelSim. Besides, it has been implemented on Altera DE2-70 board
modelsim_win64_se_10[1].1c_crack
- modelSim软件破解方法，用于cpld仿真等-modelSim software crack method for simulation cpld
modelsimPdebussy-batch-processing
- 内容包括采用Windows批处理方式高效执行Verilog仿真验证的方法，采用Modelsim+debussy联合仿真，里面包含一个加法器实例，批处理文件，仿真指令等。-Included with Windows batch efficient implementation of Verilog simulation method, using Modelsim+debussy co-simulation, which contains an example of an adder, batch
modelsim-se-10.1a-crack
- modelsim10.1a的破解文件，已测好用，破解简单-modelsim10.1a crack file, have been measured easy to use, simple crack
ex1
- 设计一个循环灯控制器，该控制器控制红、绿、黄三个发光管循环发亮。要求红发光管亮2秒，绿发光管亮3秒，黄发光管亮1秒。（假设外部提供频率为1MHz的方波信号） 编程环境为Quartus II 11.0 仿真环境为 Modelsim 6.6d 通过仿真可以看出。系统复位后，红发光管亮2秒，绿发光管亮3秒，黄发光管亮1秒，三个发光管循环发亮。 -Design a loop lamp controller that controls the red, green and ye
gtkwave.pdf
- 著名公司GTKwave，在苹果或Linux中摆脱Modelsim的束缚。-GTKwave, using for Mac or Linux.
music_player
- 基于modelsim和FPGA的音乐播放器-Modelsim and FPGA-based music player
wishbone
- wishbone片上总线系统设计，实现基本的共享总线实例。并用modelsim进行仿真。-wishbone chip bus system design, to achieve the basic shared bus instance. And use modelsim simulation.
modelsim
- 这是一个适合初学者学习的好文档 -a pdf
mather
- 通过文件读写方式实现Matlab和Modelsim的联合仿真-Be achieved through the document literacy co-simulation Matlab and Modelsim
yimaqi_beh
- 8位计数器作业中的behavioral描写，没有带testbench，已经通过-1. Construct VHDL models for 74-139 dual 2-to-4-line decoders using three descr iption types, i.e., behavioral, dataflow and structural descr iptions. Synthesize and simulate these models respectively in the en
zhilingyimaq
- 指令译码器电路的设计，包含具体程序和步骤，使用了QuartusⅡ和ModelSim软件。-Instruction decoder circuit design, including specific procedures and steps to use the Quartus Ⅱ and ModelSim software.
fpga_fenpin
- 这个是根据fpga芯片写的分频模块，modelsim综合，QuartusII测试-This is the fpga frequency module, modelsim comprehensive, QuartusII test
FFT_2c8
- 基于FPGA的fft，快速傅立叶变换，带仿真modelsim,硬件测试成功-FPGA-based fft, fast Fourier transform, with simulation modelsim, hardware test is successful
1
- 实现dlx五级流水线的lw sw addi subi multi等指令功能 ，在modelsim软件环境下仿真模拟实现。-Achieve dlx five pipeline lw sw addi subi multi other command functions, in modelsim simulation software environment to achieve.
Low-Error-and-Hardware-Efficient-Fixed-Width-Mult
- VERILOG Code for IEEE Paper Low-Error and Hardware-Efficient Fixed-Width Multiplier by Using the Dual-Group Minor Input Correction Vector to Lower Input Correction Vector Compensation Error Run by ModelSim 6.2 software Here paper output and m