搜索资源列表
KID_ROM
- VHDL实现的只带rom的CISC模型微处理器设计 实现的是输入10个数，输出最小负数-VHDL implementation of the model with only rom the CISC microprocessor designs Realize that the number of input 10 and output the smallest negative
synth_fft
- 用VHDL语言实现rom存储,可以选择不同的存储空间，有多种控制信号-Rom storage using VHDL language, you can choose a different storage space, there are several control signals
Group27_lab5
- VHDL的基本门，ram，rom等的实现-VHDL basic door, ram, rom, etc. to achieve
vhdl2
- vhdl语言正弦信号发生器设计，传统的用分立元件或通用数字电路元件设计电子线路的方法设计周期长,花费大, 可移植性差。本文以正弦波发生器为例,利用EDA 技术设计电路,侧重叙述了用VHDL 来完 成直接数字合成器(DDS) 的设计,DDS 由相位累加器和正弦ROM 查找表两个功能块组成,其 中ROM查找表由兆功能模块LPM-ROM来实现。-The traditional use of discrete components or general purpose digital cir
Rom_Control_FPGA
- 用VHDL语言写的ROM控制器，对于编写BUFFER的同志可以用来参考。具有一定价值。-Written in VHDL language using ROM controller, for the preparation of the comrades BUFFER can be used for reference. Has a certain value.
rom_control
- 基于vhdl的源代码，主要用于对ron进行操作，是通过读rom的数字实现的-Vhdl source code-based, mainly for the operation of the ron, rom by reading the digital implementation
VHDL_Sample
- VHDL VGA彩条发射器，里面有4个文件，分别是直接输出的，还有通过ROM查找颜色的，通过RAM和DRAM的-VHDL VGA color of the transmitter, there are 4 files, namely, direct output, as well as to find color by ROM, RAM and DRAM through the
sin
- 设计一个正弦信号发生器，用VHDL设计出同步寄存器、相位累加器等，正弦ROM查找表建议采用定制器件的方法完成，正弦ROM数据文件可以用C代码完成。-failed to translate
fangbo
- 关于方波发生器的VHDL代码，用rom表装载数据然后AD转换-Katanami the code generators vhdl
rom_decoder_ram
- 三八译码器 VHDL语言 ROM RAM-Thirty-eight decoder
servomat
- antidad_a EQU s0 talto EQU s1 Rename register sX with <name> tbajo EQU s2 indicador EQU s3 cantidad_b EQU S4 Define constant <name>, assign value name ROM output file generated by pBlazIDE assembler VHDL "ROM_form.vhd", "ser
alu_simulation
- VHDL alu unit design and simulation with RAM, ROM, clock generator and 2 simple programs to execute.
test_cpu
- 自己编的小型CPU，可执行简单的代码，作为对开发CPU的尝试。里面包含ROM和CPU。CPU通过状态机执行指令。在Modelsim中仿真通过。-Small VHDL CPU,as a example for developing CPU. It is simulated by Modelsim.
88VHDL(1)
- 选用一种设计方案定制ROM（乘法器宏模块）的方法设计一个八位乘法器，利用quartus软件进行VHDL程序的编写，然后对程序进行仿真验证，并对所设计的乘法器进行评价。-Use a custom ROM design ( multiplier macro module ) method to design a eight multiplier, the use of quartus software VHDL program, then the program is validated by si
LCD
- VHDL语言由1206显示rom中的数据-VHDL language rom in the data from 1206 show
LIA
- 该vhdl代码用两个rom模拟产生两路正弦波，并设计了一个乘法器将两路正弦波相乘。-The two vhdl code with two rom analog sine wave and design a multiplier to multiply two sine wave.
sin
- vhdl语言写的基于rom的正弦波发生器，包含代码和仿真图-VHDL language used to write rom-based sine wave generator contains code and simulation Figure
DDS
- FPGA，基于VHDL语言，用于ROM查找表的方式，实现DDS，能够输出正弦，方波，锯齿波，方波四种波形，可以改变幅值和频率。-DDS based on FPGA(VHDL)
VHDL-code-of-ROM-Based-Instruction-Memory
- code for 16 bit instruction memory
fengming
- VHDL实现蜂鸣器唱歌，已验证通过，音乐文件采用ROM存储。-VHDL implementation buzzer singing, has been verified through.