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sdram_vhd
- FPGA设计的SDRAM控制器，有仿真代码，已通过验证-FPGA Design of SDRAM controller, there is simulation code has been validated
SRAM_controller
- 对于想编写sdram控制器的人来说，值得借鉴-Sdram controller would like to prepare for the people, to learn
User_manual_2410x
- This manual describes SAMSUNG s S3C2410X 16/32-bit RISC microprocessor. This product is designed to provide hand-held devices and general applications with cost-effective, low-power, and high-performance microcontroller solution in small die size
xilinx_sdcontroller
- xilinx公司的sdram控制器代码及说明文件-sdram controller of xilinx, codes and notes
Xil3SD1800A_MIG_simplifiedUI_vlog_v92
- verilog 实现的spartan 3A dsp start kit DDR2 SDRAM 控制器-verilog achieved spartan 3A dsp start kit DDR2 SDRAM controller
SDRAM_controler_code
- SDRAM的verilog控制器代码极其仿真模块-The verilog code for SDRAM controller is extremely Simulation Module
9927434sdr_sdram
- SDRAM 控制器的部分源代码，希望能有所帮助-SDRAM controller logic，only a part
sdram_mdl
- 基于FPGA的SDRAM控制硬件源代码程序，-FPGA-based SDRAM controller hardware source code program,
AMBA_INTERFACE
- The Design and Implementation of AMBA Interfaced High-Performance SDRAM Controller for HDTV SoC
c_xapp260
- xilinx应用指南xapp260的中文翻译版本。利用 Xilinx FPGA 和存储器接口生成器简化存储器接口。本白皮书讨论各种存储器接口控制器设计所面临的挑战和 Xilinx 的解决方案，同时也说明如何使用 Xilinx软件工具和经过硬件验证的参考设计来为您自己的应用（从低成本的 DDR SDRAM 应用到像 667 Mb/sDDR2 SDRAM 这样的更高性能接口）设计完整的存储器接口解决方案。-The use of Xilinx FPGA and Memory Interface Gen
c_xapp851
- 这是xilinx应用指南xapp851的中文版本。本应用指南描述了在 Virtex™ -5 器件中实现的 200 MHz DDR SDRAM （JEDEC DDR400 (PC3200) 标准）控制器。本设计实现使用 IDELAY 单元调整读数据时序。读数据时序校准和调整在此控制器中完成。-This is the xilinx application note xapp851 the Chinese version. This application note describes
ddr_sdr_V1_1
- DDR控制器 - 用XILINX Virtex II FPGA实现 - 使用DDR MT46V16M16作为仿真模型 - 通用化-DR SDRAM Controller Core - has been designed for use in XILINX Virtex II FPGAs - works with DDR SDRAM Device MT46V16M16 without changes - may be easily adapted
pudn
- VHDL写的SDRAM的精简控制器。包含SDRAM接口控制器，和数据读写控制。含有实际抓取的signatap波形。为初学SDRAM者的，最好参考。-A SDRAM controller written in VHDL.Including SDRAM interface controller, read and write control. It is the best reference for SDRAM learners .
test
- Verilog HDL SDRAM controller
Sdram_Control_4Port
- 用Verilog写的SDRAM的控制器的代码，分为详细实现了对SDRAM的控制-Written using Verilog code for SDRAM controller is divided into in detail to achieve the control of SDRAM
sdramc_controller
- sdram 控制器 用verilog语言实现 可综合-sdram controller can be integrated with the verilog language
MEdia_control_i2c
- 将来自MAC的GMII8B码进行8B/10B编码。FPGA输出10路10B码的数据，如有必要，可配置外挂SDRAM，FPGA还得实现SDRAM控制器，-Will come from the MAC' s GMII8B codes 8B/10B encoding. FPGA output 10 Road 10B code data, if necessary, can be configured to plug SDRAM, FPGA have to realize SDRAM contro
sdram_vhdl_lattice
- SDRAM控制器：基于VHDL语言的SDRAM控制器-SDRAM controller: SDRAM controller based on VHDL language
040402~~
- 虽然与SRAM相比，SDRAM需要额外的控制逻辑，有更复杂的时序要求，需要定时刷新，但是由于SDRAM具有单位空间存储容量大和价钱便宜的优点，因而被许多的嵌入式开发者所青睐。为此，针对这种情况，必须设计SDRAM控制器。为了降低系统成本，本课题采用FPGA技术，并使用VHDL语言研究了FPGA与SDRAM的存储器接口实现问题。-Abstract In order to expand the SDRAM’S storage capacity of the TS一101 processor，a me
sdram_controller
- sdram controller written in vhdl and tested