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Programming32-bitMicrocontrollersinC
- 采用MIPS内核的32位PIC单片机采用C语言编程的经典书籍（英文版）-The use of MIPS cores of single-chip 32-bit PIC using C language programming of classic books (in English)
VRS51L3074
- VRS51L3074是一款嵌入非易失性 FRAM存储器的8051MCU。该器件8KB真正的非易失性随机存储器映像到VRS51L3074的XRAM存储寻址空间上充分发挥其快速读写以及读写寿命无限的特点。单周期8051处理器 内核可以提供高达 4O MIPS的吞吐量，并且与标准8051s指令兼容。 -VRS51L3074 is an embedded non-volatile FRAM memory 8051MCU. The device truly non-volatile 8KB RAM VRS
TMS320LF2407A
- ti公司的TMS320x240xA系列芯片的使用方法，很全面的，但是是纯英文版的，有识之士拾之 -The TMS320LF240xA and TMS320LC240xA devices, new members of the TMS320C24x generation of digital signal processor (DSP) controllers, are part of the TMS320C2000 platform of fixed-po
ALUC
- 用verilog语言中xilinx平台上实现single ALU,包括alu的基本MIPS指令运算,ALU control的实现-Xilinx verilog languages with the platform to achieve single ALU, including the basic MIPS instructions alu operations, ALU control implementation
MIPS1CYCLE
- MIPS single-cycle processor design in verilog.Instruction memory to the design and initialise it with your assembly code-a. Load the data stored in the X and Y locations of the data memory into the X and Y registers. b. Add the X and Y registers an
ATmage32
- ATmega32是基于增强的AVR RISC结构的低功耗8 位CMOS微控制器。由于其先进的指 令集以及单时钟周期指令执行时间，ATmega32 的数据吞吐率高达1 MIPS/MHz，从而可 以缓减系统在功耗和处理速度之间的矛盾。-ATmega32 AVR RISC-based structure of the enhanced low-power CMOS 8-bit micro-controller. Because of its advanced set of instructio
single_cycle
- single cycle mips code in vhdl
cn_ATmega8
- 产品特性 • 高性能、低功耗的 8 位 AVR® 微处理器 • 先进的 RISC 结构 – 130 条指令 – 大多数指令执行时间为单个时钟周期 – 32 个 8 位通用工作寄存器 – 全静态工作 – 工作于 16 MHz 时性能高达 16 MIPS – 只需两个时钟周期的硬件乘法器 • 非易失性程序和数据存储器 – 8K 字节的系统内可编程 Flash 擦写寿命 : 10,000 次 – 具有独立锁定位的可选 Bo
a
- mips single cycle verilog code for add,sub,bne,slt,lw,sw,xori instructions-mips single cycle verilog code for add,sub,bne,slt,lw,sw,xori instructions
mips_single
- 這是以verilog所撰寫的MIPS single CPU文件檔。可完成簡單的加減運算。 -This is the verilog are written in MIPS single CPU document file. To be completed by the simple addition and subtraction.
SCMIPS
- 使用verilog代码描述了一种简单的单周期MIPS处理器实现，并在ModelSim SE6.5c调试通过。-The verilog code describes a simple, single-cycle MIPS processor implementation, and debugging through in ModelSim SE6.5c,.
winmips64
- winmips64是MIPS汇编的工具，根据汇编代码，可以单周期或者多周期运行，结果直观，功能强大-winmips64 is MIPS assembly tools, according to the assembly code, you can single-cycle or multi-cycle operation, the result intuitive, powerful
MIPS789
- 一个32位的5 级流水线处理器。在构架这个处理器的结构过程中是按照MIPS指令进行各个流水段的功能划分，并且在处理各种相关的时候参照了手头上的一个GCC_MIPS的C 语言编译器，因此支持MIPS 1指令系统。编译器的支持使这个核心有了实用价值，这个核心可以应用于各种嵌入式系统设计，代替常规的单片机实现片上系统，还可以在一个芯片里加入多个内核并且灵活的总线连接实现多处理器设计。-A 32-bit pipelined processor 5. In the framework of this pr
Lab7
- CSCE2214课程设计，试验7源代码。实现单周期的MIPS CPU 16位。-CSCE2214 curriculum design, test 7 source code. Achieve single-cycle MIPS CPU 16 place.
scmips_cpu
- 自己写的单周期mips CPU和测试工程-Write your own single cycle mips CPU and test engineering
code
- Mips单周期CPU设计（支持7条指令addu、subu、ori、lw、sw、beq、lui）-Mips single-cycle CPU design
Project3-Logisim
- 用logisim写的单周期CPU，可以跑MIPS汇编编译的二进制代码，测试完美通过，供学弟学妹参考，计算机组成原理试验-Logisim write cycle with a single CPU, you can run the MIPS assembler binary code, test perfect pass for mentees reference, computer composition principle test
project3
- 计算机组成原理 Logisim完成单周期处理器开发 支持指令集MIPS-Lite2-Principles of Computer Organization Logisim complete development support single-cycle instruction set processor MIPS-Lite2
openocd-0.8.0
- OpenOCD provides on-chip programming and debugging support with a layered architecture of JTAG interface and TAP support including: - (X)SVF playback to faciliate automated boundary scan and FPGA/CPLD programming - debug target support (
MIPS32SingleCycle
- VHDL Implementation of a 32bit Single Cycled MIPS.-VHDL Implementation of a 32bit Single Cycled MIPS.