搜索资源列表
small-programs-using-verilog
- 148个用verilog编写的小程序，易于初学者学习，部分代码还有testbench-148 small programs written using verilog, easy for beginners to learn, there are some code testbench
I2C_Verilog_Model
- 该源程序包是I2C的Verilog语言模型，包括以下4个部分：RTL源代码，测试平台，软件仿真代码，说明文件。-This source package is I2C bus model based on Verilog language. It has the following 4 parts: RTL code, testbench, sofeware simulating code, help document.
SD_Controller_Verilog
- 该程序包是SD卡/MMC卡控制器SDC的verilog语言包，它包括以下4部分：RTL源代码，测试平台，软件仿真文件，说明文件。-This source package is the SD card and MMC card controler model based on the Verilog language. It has the following 4 parts: RTL language, testbench, software simulating files and help
testbench
- 介绍如何编写verilog的仿真程序，很适合初学者-How to write verilog simulation program, it is suitable for beginners
mppt_mod
- maximum power point tracking system (MPPT) VHDL code with testbench
fifo_tb
- verilog implementation of 16X4 fifo with testbench
verilogtestbench
- 关于verilog的testbench资料文档，通过文档可以更好的了解verilog的testbench的写法。-The testbench verilog information about the document, through a better understanding of the document to the testbench verilog is written.
Viterbi_Verilog
- viterbi译码的verilog实现,提供相应的原程序代码和testbench -viterbi decoder verilog implementation
ssram-and-tesebench
- 实现一个256x8的同步静态存储器SSRAM，用硬件描述语言Verilog写的，同时谢了测试程序-it realized a 256x8 SSRAM,writen by Hardware descr iption language Verilog ,and include the testbench.
Verilog-testbench
- 北大数字集成电路课件--15_Verilog-testbench的写法.ppt-Verilog-testbench .ppt
testbench_P_verilog
- 怎样编写testbench verilog-how to write testbench verilog
Writing-Testbenches-using-System-Verilog
- writing testbench in system verilog
how-to-write-testbench
- 怎样写testbench ， 仿真， modelsim， system verilog or verilog， 代码风格，行为级代码-how write testbench，do simulation, modelsim, system verilog or verilog , behaveral level code
verilog-testbench-preliminary
- 本文简单介绍了逻辑验证的入门知识—如何编写TESTBENCH进行逻辑测试-This paper briefly introduces the logic verification started- how to write TESTBENCH logic test
how-to-write-testbench
- 如何写好testbench,针对verilog语言-how to write testbench，aimed to verilog
verilog-testbench--technique
- verilog testbench的写法和技巧，适合初学者-Verilog testbench of writing and techniques for beginners
testbench
- VHDL和verilog的TESTBENCH 编写方法。非常好的资料。英文的,但很简单。-Written in VHDL-TESTBENCH. Very good information. In English, but very simple.
verilog-testbench-preliminary
- 硬件描述语言verilog的testbench的写作方法-the writing method of the testbench of verilog
A-Verilog-HDL-Test-Bench-Primer
- 学习资料：详细说明了如何用Verilog语言编写Testbench文件-Learning materials: detailed descr iption of how to use Verilog language Testbench file
ImageRotate
- verilog实现图像旋转，可终合，并带有Testbench-verilog image rotation, and can be a final, and with Testbench