搜索资源列表
uartrx
- FPGA的verilog uart 接收端程序。非常实用-The FPGA verilog uart receiving end procedures. Very practical
UART-FPGA
- verilog的UART通信，解决了接受过程中的毛刺问题，将接受和发送两个过程独立开来-The UART verilog communication, solve problems receiving glitches during the process of receiving and sending two separate open
Fix-data-send-UART
- Fix data UART send and receive verilog codes.
uart
- Verilog,实现Uart的收、发功能-Verilog, achieve Uart the sending and receiving functions
FPGA7_UART
- 基于FPGA Verilog UART接口数据传输-Based on the FPGA Verilog UART interface data transfer
UART
- 本代码用verilog语言配合sopc和nios实现了串口调试的目的。软件编程用C语言描述，只是比较简单的例子，适合初学者做了解用，本人亲自在EP2C8Q上实践。-The code to use verilog language sopc and nios achieved with serial debugging purposes. Software programming using C language descr iption, but relatively simple exampl
uart
- 基于FPGA的UART程序设计，VERILOG HDL语言编写，可实现串口通信，波特率为115200。已通过串口调试助手验证。-FPGA-based UART program design, VERILOG HDL language, enabling serial communication baud rate to 115200. Has been verified through the serial debugging assistant.
UART verilog代码
- UART verilog代码，基于时间单位为1ns，精度为100ps的UART代码
verilog-procedures
- fpga的基于verilog的串行数据转并行数据的相关资料，相关内容uart协议，串并转换程序-verilog fpga-based serial data to parallel data, relevant information, relevant content uart protocol string and conversion program
Uart
- 用Verilog实现简单的串口通信，经过功能仿真和板上调试，接收和发送模块均无问题-Using Verilog realize a simple serial communication, through functional simulation and on-board debugging, had no problems receiving and sending module
uart
- uart设计的verilog代码，支持双工的串行传输，兼容synopsis 的DW_uart的编程模型-verilog code uart design, support duplex serial transmission, compatible synopsis of the programming model DW_uart
uart
- 基于RS232的串口通信 源代码-UART base on rs232 verilog files
uart-verilog
- Uart的设计，Verilog语言，包含设计文档。-Uart design, Verilog language, including design documentation.
18.uart
- 用Verilog HDL编写的uart程序，亲测可行，注释很详细！-Written using Verilog HDL uart program, pro-test is feasible, very detailed notes!
UART(RS232)
- 用VERILOG语言实现的通用异步串行收发器（RS232收发器），波特率可设置，通讯稳定，已成功应用于实际项目。-VERILOG language with universal asynchronous serial transceivers (RS232 transceiver), the baud rate can be set, communication stability, has been successfully applied in actual projects.
UART-Verilog-source
- Verilog编写UART串口例程，实现FPGA与上位机串口通信，利用ASCII码进行大小写转换，在Xilinx Virtex-5开发板测试通过-UART serial routines written in Verilog, FPGA serial communication with the host computer using the ASCII code case conversion, in the Xilinx Virtex-5 development board test
lab-uart
- verilog RS232 讀取跟寫入和傳送資料-verilog RS232 with write and read data transfer
UART
- uart程序包含了串口的VERILOG程序以及测试代码-The program contains the serial uart VERILOG program and test code
UART-Transmitter
- UART transmitter using Verilog
UART
- Verilog HDL编写的串口程序实例，很详细好用的参考代码。针对Xilinx FPGA开发板，在Xilinx ISE编译调试成功，串口开发的经典例程。-Verilog HDL serial program written examples, very good reference code in detail. In view of the Xilinx FPGA development board, in Xilinx ISE compiler debugging success, a s