搜索资源列表
H.265_X86_DEMO
- ZPAV（小名H265），凝集 形态，分形，模糊，小波，数字图象处理学 等数学精华， 我 感受到了她的威猛的能量，听到了她的呐喊！她如春雷， 震撼着 单薄数学（DCT+ME+HUFFMAN等）的MPEGxx和H26xx的古老统治！ ZPAV (H.265) 基本算法 ：V0,V6 用了 二维小波；V8 用了 三维小波；V9 用了 四维小波； P帧（ME） 使用了 小波域运动估计；声音(A0,A6,A8,A9), 运动矢量（MV） 使用了 广义小波。 Z
dct_source_code
- DCT source code,verilog代码。有兴趣的可以参考下。
fft
- jpeg压缩中离散余弦变换DCT快速算法代码，使用的是verilog
dct1234
- dct 变换编码的verilog语言程序，已经通过模拟仿真
two_d_dct_serial
- altera公司提供的适用于包涵DSP内核的FPGA的二维DCT变换源码，语言是：verilog 性能不错，不过资源消耗有点大，可以用来学习多项式变换的DCT算法-ALTERA companies covered in the application of FPGA DSP core 2D DCT source language is : Verilog performance is good, but a bit large consumption of resources can be us
2DImageFilterByVHDL
- 用VHDL语言编程实现2维图像的滤波算法，简单精辟-VHDL programming language used to achieve 2-D image filtering algorithm, simple brilliant
4945579081DCT_2D
- dct-20 verilog vhdl de2
DCT_IDCT
- H264/AVS中的离散余弦变换DCT以及反离散余弦变换IDCT的Verilog代码-H264/AVS the discrete cosine transform and inverse discrete cosine transform DCT IDCT of Verilog code
dctidct
- dct and idct code for verilog
s22_DCT
- 这是一个DCT变换的VERILOG代码，欢迎下载-This is a code of DCT transformation in verilog ,welcome to download!
OneD_DCT8
- 一维DCT变换，使用Verilog ＨＤＬ语言实现。有ＳＹｎｐｌｉｆｙ编译脚本-One-dimensional DCT, using the Verilog HDL language to achieve. The SYnplify compiled scr ipt
IQIT
- Inverse quantization and DCT for h.264 in verilog
INT_DCT
- Verilog HDL语言实现的整数DCT变换模块。其中包括一维和两维的DCT变换模块各一个。该模块都通过硬件仿真以及FPGA实现后的测试，均满足预期的DCT变换功能。-Integer DCT transfer module with Verilog HDL format. The package includes one 1-D and one 2-D DCT transfer module, which all pass simulation and FPGA evaluation.
hw
- 基于jepg格式的dct变换的verilog代码实现-Based jepg format dct transform verilog code
fpga-jpeg
- 包含DCT变换，RGB2YCBCR,JPEG等多个verilog代码及工程-Contains DCT transform, RGB2YCBCR, JPEG and many other verilog code and project
dct2d
- this program is written in verilog compute the dct transform of an image used for jpeg and other image compression methods-this program is written in verilog compute the dct transform of an image used for jpeg and other image compression methods
DCT_IP_Testbench
- 一个DCT变换的完整IP，基于Verilog编写，同时包括完成的testbench，方便模块的仿真和测试。-DCT transform a complete IP, based on Verilog prepared, including both complete testbench, convenient module simulation and testing.
dct1234
- dct 变换编码的verilog语言程序，已经通过模拟仿真-DCT transform coding of the Verilog language program has been through simulation
dct8x8
- 全流水线1维8点DCT变换，用于JPEG编码，无乘法运算,verilog-Full-line one-dimensional 8-point DCT, for JPEG encoding, no multiplication
dct2d
- 研究生课程 ： 来源于Xilinx公司，二维DCT变换代码。-Graduate courses: from Xilinx, 2D DCT function implementation verilog code.