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async_transmitter
- RS232。串行通信接口RS232，verilog -failed to translate
uartverilog
- 该程序是Verilog写的串口收发程序，具有基本的收发功能，经过验证，能使初学者很好了解rs232，和Verilog-The program is written in Verilog serial transceiver program, with the basic send and receive functions, proven, good for beginners can understand rs232, and Verilog
Serial-debugging
- 本文分析RS232 串口通信的原理，介绍Verilog 模块调用的方法-This paper analyzes the principle of the RS232 serial communication, introduction to the Verilog module calls the method
async_transmitter
- RS232的FPGA code，利用Verilog實現傳輸的部分。
Verilog_RS232(Uart)
- 用verilog编的rs232，uart串口程序，很好用-a program about rs232 with verilog
USART
- RS232串口通信的VERILOG代码，包含了测试文件，及参数文件，用户只需要修改参数文件里的参数即可满足不同的应用需求；由于串口逻辑比较简单，程序中没有注释；-RS232 serial communication VERILOG code contains the test files and parameter files, users only need to modify the parameters in the parameter file to meet different app
rs232_interface
- RS232串行接口verilog代码和测试-Verilog code and testing of the RS232 serial interface
uart_232
- RS232的verilog控制程序，8位数据传输，奇校验，一个停止位，已经过singnaltap验证-RS232 verilog control procedures, the eight data transmission, odd parity, one stop bit, verification has been singnaltap
RS232Control
- FPGA verilog代码描写的RS232控制模块-RS232 control module in Verilog for FPGA
RS232_PS2_Control
- Verilog语言编写的RS232控制模块以及RS232到PS2的通信接口模块。整个模块已经通过Virtex4的FPGA平台上的硬件仿真和验证。-Verilog HDL model for RS232 and PS2 interface communication control block. It includes the RS232 RX-TX model as well as PS2 model, and it have already been proven in FPGA virtex
chenyu--chengxu
- 利用verilog语言编写的RS232转换到RS485程序，实现总线通信-Verilog language converted to RS485 RS232 bus communication
bit4_4
- 利用verilog语言编写的控制4个继电器开关动作的程序， 采用RS232通信-Verilog language program control the four relay switch action RS232 communication
1.UART
- 该代码主要实现UART的串行通信，针对的是RS232芯片，同时包含了verilog和VHDL编写的程序-The code UART serial communication, RS232 chip, also contains a program written in verilog and VHDL
uart_Verilog
- 基于Verilog的RS232串口通信实验，可发送256位数据，并在Altera的EP4CE15F17C8芯片上验证成功。-Verilog-based RS232 serial communication experiment, 256-bit data can be sent on Altera' s EP4CE15F17C8 chip authentication is successful.
verilog_rs232_rx_tx
- fpga中verilog实现的rs232串口收发逻辑，基础入门，参考学习串口收发-FPGA in Verilog implementation RS232 serial port transceiver logic, based on entry, refer to the study serial transceiver
RS232_tx
- 串口发送程序，verilog实现，可综合。-program for rs232
UART_RX
- 232串口源程序 verilog实现，频率可调 接受部分-RS232 verilog
UART_TR
- rs232串口通信 verilog代码 发射部分-RS232 verilog
QUARTUS_WORK_FORTH
- 基于verilog语言的，FPGA程序实现电脑与FPGA串口的数字传输，硬件设备为EP1C3T100C8，usb转RS232芯片为FT232BM，-Based verilog language, FPGA program FPGA serial digital transmission of computer and hardware devices to EP1C3T100C8, usb to RS232 chip FT232BM,
exp6_Uart
- xilinx FPGA的rs232 Verilog HDL程序-xilinx FPGA的rs232 Verilog HDL