搜索资源列表
DDS9912
- AD9912芯片的接口控制程序，SPI通信方式Verilog编写-AD9912 interface Verilog
code-code
- spi，uart等接口的verilog代码和说明文档，能帮助大家了解总线的功能。-spi, uart verilog code and documentation, such as interfaces, can help you understand the function of the bus.
FPGA_51
- 51+FPGA架构的通讯口扩展,用verilog语言编写，扩展了Ｉ２Ｃ，ＳＰＩ，ＲＳ２３２。-51+ FPGA architectures communication port expansion, with verilog language, extends the I2C, SPI, RS232.
spi1
- 使用verilog语言编写的实现cpld EPM570与EEPROM的SPI通信-Using verilog language to achieve cpld EPM570 SPI communication with the EEPROM
SPI_Core_2
- 用Verilog HDL 语言编写的，可在FPGA上实现的SPI总线主端 收发读写模块 -SPI Master Read-Write controller core which was Writted by Verilog HDL based on fpga
W25Q16_verilog_ise
- 一个基于w25q16的四通道flash读写操作控制器，spi传输。verilog语言编写，在ise的chipscop上验证可行，仅作学习参考-this is refrence about flash w25q16 controller ，writed by verilog
V2.tar
- SDIO slave, written in verilog, does not support SPI mode.
myspi(final)
- 此代码是SPI接口的Master的Verilog源代码,能很大程度学习相关算法，解决问题-This code is SPI interface Master of Verilog source code
hdl
- spi verilog ad9628-spi verilog ad9628
spi_rtl
- 支持主从模式的、可综合的SPI verilog代码-Supports master and slave mode SPI communication module can be integrated RTL code
HAPF_SLAVE2
- 高压链式SVG控制用FPGA的verilog程序,其中包括SPI，16路SCI同步通讯模块程序，保护自锁功能程序，基于滞环的无功功率检测和补偿策略；还包括FPGA和DSP之间通过总线方式进行数据的快速交互等；程序完整-SVG high voltage chain of verilog FPGA control procedures, including SPI, 16 road SCI synchronous communication module procedures to protect
spihost
- fpga spi 串口 Verilog-fpga spi Verilog
NiosII_SPI_bus
- 采用altera公司EP3C系列芯片实现的基于Nios II的SPI总线设计，采用Verilog编码-Altera company EP3C using the Nios II series chip SPI bus-based design, using Verilog coding
MCU2FPGA_SPI_TB
- 本程序使用Verilog语言实现了SPI接口的设计，可以直接烧到FPGA实现与MCU的通信,自带有测试文件。-The program uses the Verilog language design SPI interface, you can burn directly communicate with the FPGA, MCU, comes with a test file.
SD_Card
- sdhc卡spi扇区读verilog例程。包含sdhc卡初始化模块及一个扇区读模块，扇区读完数据放在一个fifo中缓存，为之后的工作做准备，可以集成到自己的项目中。已经在闪迪8Gsdhc卡上亲测成功-sdhc card sector read spi verilog routine. Initialization module and a read module contains sdhc card sector, the sector read data in a cache fifo in
receive_spi
- verilog语言SPI通信，可用于CPLD以及FPGA-Verilog language SPI communications, can be used for CPLD and FPGA
SPI_MASTER
- 使用verilog实现SPI主机，包括TB程序,通过验证可以使用。-using verilog come ture spi,including tb program ,it s can use .
spi_ipcore
- 比较实用的SPI Verilog 编程，里面有仿真时序和源代码，简单改一改可直接，支持SPI双模式。-More practical SPI Verilog programming, which has simulation timing and source code, simple and can be directly altered, supports SPI dual mode.
AD_ID
- ad7175的测试spi通讯是否正常的verilog HDL程序，读取ad7175中的id寄存器值。-ad7175 spi communication test whether the normal verilog HDL program that reads the ad7175 id register values.
3_05_SPI_Wr_Rd
- SPI读写实验，verilog源码，编译通过，有需要的拿去用-SPI source code