搜索资源列表
jesd204
- Xilinx JESD204 CORE的顶层wrapper与仿真文件，实际与仿真测试通过-JESD204 CORE top-level wrapper file and simulation
gtx_tb
- xilinx gtx core的仿真文件，以便更好地利用GTX-JESD204 CORE top-level wrapper file and simulation
sha1_v01
- sha1_testbench.v -- Testbench with vectors NIST FIPS 180-2 sha1_exec.v -- Top level sha1 module sha1_round.v -- primitive sha1 round dffhr.v -- generic parameterizable D-flip flop library Performance Analysis Performance equa
nr_loopback
- Bus Glue for Xilinx EHCI core on the of_platform bus.
dcm_1202
- 本程序是基于Xilinx的FPGA编程，运用ip核进行时钟的管理，且有测试程序。适合FPGA初学者。 -This procedure is based on Xilinx FPGA programming, using ip core clock management, and there is the test program. FPGA for beginners.
fft_512
- 采用Xilinx提供的VHDL FFT ip核实现512点FFT，可以实现使能控制、时钟控制等功能-Using Xilinx provides VHDL FFT ip core to achieve implementation of 512 points FFT, with enable control, clock control and other functions
dt-binding
- Binding for Xilinx Clocking Wizard IP Core.
ml605_pcie_x4_gen2
- 使用与xilinx的ml605套件的pcie核程序，芯片 型号是v6系列的4通道的pcie设计。内部包括pcie ip核和用户端程序。已亲测。-Xilinx ml605 using the kit pcie nuclear program, chip model is v6 series of 4-channel pcie design. Internal including pcie ip core and client programs. It has been pro-test.
testbench
- 这是基于xilinx ise软件中pci核的仿真程序。文件包括激励程序，顶层程序。可以用于modelsim仿真-This is based on xilinx ise software pci core simulation program. Files include incentive program, the top program. It can be used to simulate modelsim
xilinx_pci
- PCI support for Xilinx plbv46_pci soft-core which can be used on Xilinx Virtex ML410 ML510 boards.
Uart
- Adding flow control to uart core of xilinx
20150520LED_IP
- xilinx SDK定制IP核，实现LED点灯，以及PWM脉冲点灯，该例程可以直接运行。里面还有相应的文档说明，定制IP学习你值得拥有。-xilinx SDK custom IP core, realize LED lighting, and lighting PWM pulse, the routine can be run directly. There is also a corresponding documentation, customized IP learning you des
hdmi_xps
- 基于XILINX SOC的HDMI配置最小系统IP核和SDK工程，用于进行HDMI芯片的配置-Configuring an HDMI chip XILINX SOC minimum system configuration of HDMI IP core and SDK works for
ddr_sdr
- DDR SDRAM Controller Core - has been designed for use in XILINX Virtex II FPGAs - works with DDR SDRAM Device MT46V16M16 without changes - may be easily adapted to any other DDR SDRAM device-DDR SDRAM Controller Core - has been designe
LED
- FPGA中实现led流水灯,通过Verilog语言编程，程序中调用了xilinx公司提供的时钟分频IP CORE-This file is to achiece led like water
Spartan-6-PCIE_tutorial1
- xilinx Spartan 6 PCIE仿真教程，PIO方式，带有TLP包分析。-XILINX PCIE tutorial device spartan6 PCIE core version V2.4
Spartan-6-PCIE_tutorial2
- xilinx spartan 6 pcie 仿真教程，v2.4版本，主要是讲解如何使用pcie core和自己的用户逻辑级联仿真。-xilinx spartan 6 pcie sim tutorial ，tell readers how to sim using pcie core and user app logic,tool:questasim
xilinx_pci
- PCI support for Xilinx plbv46_pci soft-core which can be used on Xilinx Virtex ML410 ML510 boards.
16FFT
- Xilinx的16点傅里叶分析，内有详细说明-The xFFT16 fast Fourier transform (FFT) Core computes a 16-point complex FFT. The input data is a vector of 16 complex values represented as 16-bit 2’s complement numbers – 16-bits for each of the real and imaginary compone
1024FFT
- Xilinx的1024点傅里叶分析，内有详细说明-The xFFT1024 fast Fourier transform (FFT) Core computes a 1024-point complex FFT. The input data is a vector of 1024 complex values represented as 16-bit 2’s complement numbers – 16-bits for each of the real and imaginary