搜索资源列表
asm
- 5位或任意位的加法及乘法汇编程序，ASC码形式。-Five or any one of the addition and multiplication assembler, ASC code form.
juzhen-jisuan
- c++课程设计，各类矩阵计算如矩阵加法、乘法、转置等，希望对大家有帮助-C++ curriculum design, various types of matrix calculations in C++ source code, we hope to
1
- c语言的入门程序 显示和加法 很简单的大家-c language entry program Display and addition We look at very simple
Smpl_DrvACMP
- 关于芯唐M0核 ADC源码 ADC 带进位的加法指令 ADC Reg/Mem, Reg/Mem/Imm 功能，将目的操作数和源操作数相加再加低位进位，结果送入目的的地址 dst+src+cf->dst， 受影响的标志位：AF、CF、OF、PF、SF和ZF，该指令的功能是把源操作数和进位标志位CF的值(0/1)一起加到目的操作数中。-About Nuvoton M0 nuclear ADC source Add instruction ADC into the ADC of Reg/
ClassFloatConsole
- 一个扩展的float类，只实现了简单的加法以及拷贝操作-An expansion of the float, only realize the simple addition and copy operation
ep1c12_8_cnt_4b
- 含异步清零的4位加法计数器，已经在实验箱上验证通过。-4 up counter with asynchronous clear has been verified by the experimental box.
ep1c12_9_adder8
- 8位硬件加法计数器的设计，已在试验箱上验证通过。-8 hardware addition the design of the counter has been verified on the test chamber.
alu
- Verilog,PIC系列ALU设计，加法、减法、逻辑运算，二进制调整-Verilog,PIC ALU Design ADD SUB XOR AND
adder128x
- 128位加法器优化设计：64位加法运算+2-1多路选择器。并在关键路径上添加寄存器，降低延迟。 testbench可以测试优化的效果，在ISE中做过综合，能跑到200+MHz-128-bit adder optimization design: 64-bit adder+ 2-1MUX. In the key path, there are regs to improve the performance and reduce the delay time. you use the tes
Test
- 简单的在VC6.0开发的加法计算器器,包含了多种方法-how to use buttom
fulladd4bit
- 這是全加器,名字為fulladd4bit.rar,功能為四位元的加法。-This is the full adder, the name of fulladd4bit.rar function is the addition of four bits.
LCD
- 基于mega16的1602的液晶程序，级一个大整数的加法，及其他一些指令。-mega16 LCD programming
68-Calculator
- 一个单片机最小系统，包括串口下载、复位电路，采用外部小键盘输入数据，能够实现加法、乘法及一个科学计算，计算结果显示在四位一体的数码管上。-A single chip minimize system, including serial download and reset circuit, use external small keyboard input data, will be able to realize the addition, multiplication and a scient
polynomial
- 实现多项式的加法和乘法 用的是指针 请读者指出错误 较为繁琐-multiply and plus
EDA
- 里面包含了众多VHDL基础小程序，如38译码、4选1、4位加法、移位，七段显示译码等。-This contains a number of VHDL basis applet, such as 38 decoding, four selected 1,4 addition, the shift register, segment display decoder.
SimpleDLL
- VB调用VC++6.0 DLL的实例,附加全部源码. 功能: 1.利用DLL弹出消息框 2.加法运算 3.减法运算(支持比较操作数)-VB use VC++ 6.0 DLL instance, attach the full source code. Functions: (1) the use of the DLL pop-up message box (2) the addition operator Subtraction (support operand)
Cal2
- 课堂学习自制VHDL计算器小程序，使用4*4键盘，A加法,B乘法,C退格,E等于,F清零。-A program of Calculator made in VHDL course in school, using 4*4 keyboard.
xor8
- verilog hdl 基础域运算加法的仿真综合实现-verilog hdl xor8
complex
- 实现抽象数据类型复数的加法减法乘法除法四种基本运算运算，-To achieve the complex addition and subtraction, multiplication and division of abstract data types
poj_2738
- poj 2738 浮点数加法的答案，供想要参考的同学们下载使用-answer to poj 2738 floating-point addition, for the students want to reference download