搜索资源列表
FIFO_v
- FIFO的verilog实现,内附testbench和文档说明-FIFO verilog achieve, enclosing testbench and documentation shows
FIFO_Syn
- 同步FIFO功能,verilog语言描述,通过了modelsim 6.0 仿真,Quartue综合
fifo
- 一个经典的fifo的Verilog工程实例,相信对初学者会有一定的帮助。-A classic instance of fifo Verilog project, I believe there will be some help for beginners.
fifo
- 异步FIFO实现 verilog代码,利用格雷码消除亚稳态-Asynchronous FIFO realize verilog code, Gray code to eliminate the use of metastable
FIFO
- FIFO,先进先出缓冲器,verilog源代码,包括测试代码。-FIFO, FIFO buffer, verilog source code, including test code.
Synchronous-FIFO-
- 一个用verilog实现的同步fifo设计,压缩包里有word介绍设计中各信号的作用-Achieve a synchronous fifo with verilog design, compression bag has the role of word describes the design of the signals
fifo
- 深度256的异步fifo 使用verilog语言编写的,能够实现简单的读写,存储功能!-256 the depth of asynchronous FIFO
fifo
- FIFO源码以及测试文件基于ISE14,Verilog语言编写,全部工程。-FIFO based on source code and test files ISE14, Verilog language, the whole works.
FIFO(verilog)
- FIFO 的verilog代码,包含测试源码,可以参考学习FIFO的编写-FIFO written with verilog
fifo
- 本程序实现简单的fifo传输,并没有加其他的功能,试用芯片xilinx,verilog语言编写-The program implements a simple fifo transmission, and no other added features, try chip xilinx, verilog language
fifo
- 异步FIFO的verilog实现,可以参考一下-Verilog asynchronous FIFO implementation, you can refer to
asyn_fifo
- 该源码包是异步fifo的Verilog语言模型,主要包括2个部分:异步fifo控制模块、测试文件。(The source package is asynchronous FIFO Verilog language model, including 2 main parts: asynchronous FIFO control module, test files.)
syn_fifo
- 该源码包是同步fifo的Verilog语言模型,主要包括2个部分:同步fifo控制模块、测试文件。(The source package is a synchronous FIFO Verilog language model, including 2 main parts: synchronous FIFO control module, test files.)
FIFO_ASY
- 异步FIFO,利用格雷码作异步FIFO指针减少亚稳态产生,利用同步寄存器放置亚稳态的级联传播。(Asynchronous FIFO, using gray code for asynchronous FIFO pointer to reduce metastable, cascade propagation using synchronous register placed metastable.)
FIFO
- 用verilog语言的实现FIFO存储器,以先进先出的方式处理数据(The FIFO memory is implemented in Verilog language, and data is processed in FIFO)
带FIFO的ov7670 FPGA应用程序,经测试可用
- 这是用Verilog编写的OV7670摄像头驱动代码,带FIFO,经测试可用。(This is written in Verilog OV7670 camera driver code, with FIFO, tested available.)
sfifo
- fifo 控制器,也是转载的,主要是为了积分(A fifo controller verilog descr iption.)
fifo
- 基于verilog HDL的fifo设计与测试,包含设计与测试代码,以及简单的makefile编写。整个平台是基于linux操作,仿真平台是基于SYNOPSYS的vcs工具。(Based on verilog HDL fifo design and testing, including the design and test code, and simple makefile.The platform is based on Linux operating, the simulation pla
FIFO
- FPGA片内FIFO实例,对FPGA片内FIFO进行读写测试(FPGA FIFO example, reading and writing FIFO in FPGA chip.)
Verilog实例代码
- 一些verilog模块的代码与tb,常见的同步异步FIFO,RAM和适合新手学习