搜索资源列表
FPGA2SRAM
- verilog code that can implemented on ACEX1k FPGA for a SRAM-verilog code that can implemented on ACEX1k FPGA for a SRAM
ATmega128
- 简要介绍： 主要芯片： CPU:ATmega128L SRAM:SR61L256BS-8 CPLD:XILINX XC95144XL SFLASH:AT45DB081B ETHERNET:CS8900A USB:PDIUSBD12 LCD:122x32 LMC62_095_M POWER:LM2596S-3.3 RS232:MAX3232 软件：RS232,SRAM,CPLD调试通过，uCosII可以运行，ethern
vga_module
- This source use to display a 256x256 RGB image from SRAM on a CRT monitor.You can use this to filter colors of the image.Image is loaded into SRAM by using DE2_control_panel
sram
- sram vhdl code. Very helpful
SRAM_Control
- VHDL Code for SRAM Control (Synthesized with Synplify-Pro, Active-HDL Simulation)
63535309sram
- verilog编写的读写SRAM的源码，包括sram的读写控制-SRAM read and write verilog source code written in, including the sram to read and write control
sram
- 单片机写双口RAM，包括读写是否一致的自动检测-Microcontroller to write dual-port RAM, including the automatic detection of the consistency of read and write
vhdl_sram_ctrl
- Sycronous SRAM in CPLD or FPGA module... tested by Altera MaxPlusII or Quatus -Sycronous SRAM in CPLD or FPGA module... tested by Altera MaxPlusII or Quatus II
SRAM_Proj
- SRAM 读写VERILOG HDL源码-SRAM read and write VERILOG HDL source code
EMCRTL
- RTL Code for Design of Extarnal Memory Controller for Accessing Asynchronous SRAM of size 512Kx16
[DATASHEET-066]Integrated.Silicium.Solution.Inc.r
- Huge set of Integrated Sillicium Solution Inc (ISSC) datasheets. Includes synchronous/asynchronous SRAM, DRAM, serial EEPROM, MCU, serial/parallel flash, and a whole bunch of other stuff.
IS64LV6416L
- Asynchronous SRAM IS64LV6416L modelsim仿真模型-Asynchronous SRAM IS64LV6416L Verilog model
Sram_core
- Implementation a Sram Controller Core
sram_512x16bit
- SRAM的控制器，与sopc集成，可直接使用，方便稳定高速，简单修改可适应于其他容量-SRAM Controller in SOPC
DSPandSRAM
- 这是DSP与SRAM存储器的接口设计，包括PCB的连接，程序的编写。希望对大家有用。-This is the DSP and SRAM memory interface design, including PCB connections, program writing. Hope to be useful.
M16C62_container_SRAM_RTC
- Renesas m16c62 nano evalution board 50x50mm. M16C62P+128KB sram+RTC+ProgPins. Protel99 Sch+PCB. Design By COOL:)
sram
- 实现单端口SRAM，地址4比特即一共16个寄存单元，数据4比特说明每个单元有四个寄存器，一共64个D-Single-port SRAM, 4-bit address that is a total of 16 storage units, data 4-bit instructions each unit has four registers, a total of 64 DFF
sram
- sram 测试程序， CYPRESS CY68013的固件程序， 主要功能测试芯片的内部和外部RAM-sram CYPRESS CY68013
SDRAM
- sram是很好的片外存储器！本文件详细介绍了sram的分类和相关程序的写法！-sram chip memory is very good! This document details the classification and related procedures sram is written!
stm32uCOSuCGUI(FSMC)3.2SRAM
- 红牛STM32 UCOS UCgui FSMC 使用SRAM当显存 触摸屏直接采用stm32的ADC分时采样-STM32 UCOS UCgui FSMC SRAM touch