搜索资源列表
ds18b20
- 单路DS18B20的verilog HDL 代码,精度为1℃无须转换数据,直接输出结果。占用300个LE资源。-Single DS18B20 the verilog HDL code, and an accuracy of 1 ℃ without converting the data, direct output. Occupy 300 LE resources.
CLOCK
- 文通过ALTERA公司的quartus II软件,用Verilog HDL语言完成多功能数字钟的设计。主要完成的功能为:计时功能,24小时制计时显示;通过七段数码管动态显示时间;校时设置功能,可分别设置时、分、秒;跑表的启动、停止 、保持显示和清除。-Through the ALTERA company quartus II software, using Verilog HDL language to complete the design of multi-function digital
ps2_mouse_interface
- ps2接口的鼠标与vga接口的驱动程序,Verilog HDL语言,运用于FPGA-ps2_mouse_interface and vga in Verilog HDL language, applied to FPGA
SPI_Slave
- SPI Slave example (VERILOG HDL)
sdram_control.RAR
- 基于XILINX FPGA的SDRAM 控制器代码。VERILOG HDL代码编写-SDRAM CONTROLER
EEPROMVerilog-HDL
- EEPROM的Verilog HDL源代码,代码全-EEPROM of the Verilog HDL source code, code all. . . . . . . .
yindaiao
- Verilog HDL语言,在FPGA开发板上实现电子琴弹奏的功能-Verilog HDL language, in the FPGA development board to achieve the functions of keyboard play
I2C
- 用verilog HDL实现I2C Master Controller 的设计,包括主程序设计和测试程序设计-Verilog HDL using I2C Master Controller to achieve the design, including the main program design and test program design
dds
- 基于FPGA的DDS设计,本程序采用verilog HDL语言编写,使用DDS+Pll倍频-The DDS-based FPGA design, the procedures used verilog HDL language, the use of DDS+ Pll frequency
RS-code
- 我测试过的!Verilog HDL实现RS编码。-I' ve tested it! RS coding Verilog HDL implementation.
tftdot
- 我用verilog hdl写的tft lcd屏的控制程序,用来点亮屏上的任意点-I write the program in verilog hdl,it is used to control the tft lcd
verilog_sdram
- SDRAM读写控制的实现与Modelsim仿真,采用verilog HDL编写-sdram controller and simulate with modelsim
Coding-style-and-guidelines-of-HDL
- 该资料对数字设计的编码风格、编码规范给出了详细介绍,并简介了VHDL、verilog的编码要点。-The information on the coding style of digital design, coding specification gives a detailed descr iption and profile of VHDL, verilog coding points.
spi
- Verilog语言写的SPI接口(层次化设计,便于升级)-The implememt of SPI interface using Verilog HDL
32_bit_complex_multiplier
- 一款32位复数乘法器,用verilog写的。-32_bit complex multiplier,written in verilog HDL.
PS_2
- 此模块用于"PS/2接口的鼠标或键盘"与"具有外部读写的8位并口单片机"双向通信模块. Verilog HDL语言编写,在Quartus II 8.1 (32-Bit)软件中编译,并下载至EPM7128SLC84-10芯片中通过. 文件中有详细的注解. 此模块具有对于PS/2时钟和数据线的滤波功能,这样减少外部干扰,保证通信的可靠性! -This module for the "PS/2 mouse or keyboard interface" and "read
HDB3
- 用verilog HDL语言,通过一个4位移位寄存器实现一个信号转化为HDB3码并进行测试 -Using verilog HDL language, through a 4-bit shift register realization of a signal into HDB3 code and test
Chapter6-9
- 第六章到第九章的代码 本书通过100多个模块实例,详细地讲解了Verilog HDL程序设计语言,全书共分13章,内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等,实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例
decoder
- 指令译码器的设计vhdl语言或者verilog HDL语言对单片机程序的处理-Instruction decoder design vhdl language or verilog HDL language processing microcomputer programs
counter
- 用Verilog HDL语言实现FPGA的频率等精度测量。(已经过验证)-Using Verilog HDL language, such as FPGA frequency measurement accuracy. (Has already been verified)