搜索资源列表
Clock_Full
- clock program on altera de2-70 board
UART_Verilog
- Altera FPGA的UART通讯程序-Altera FPGA' s UART communication program
UP_IP_Library_80
- altera大学IP库，包含ps2、sdram、rs232等-altera University, IP libraries, including the ps2, sdram, rs232, etc.
lpm_ram
- altera LPM_RAM的使用,有简单的程式和模拟结论.大家写的时候可以参考.-altera LPM_RAM the use of a simple programming and simulation findings. we can refer to when writing.
CPU11111
- altera提供的sdram ip核例程，简单易懂。采用burst8模式。 -altera provided by the sdram ip core routines, easy to understand. Using burst8 model.
s4gx_reconfig_sim
- 这是Altera ALTGX的动态重配置的一个应用实例。包含源码，动态重配置文件和仿真文件，经过验证，实际可用。-This is the Altera ALTGX the dynamic reconfiguration of an application example. Contains the source code, dynamic re-configuration files and simulation files, proven, practical use.
PWM_GEN
- 这是Altera PWM生成的一个实例。包含project文件，源代码，仿真文件。经过验证，实际可用。-This is an example of Altera PWM generated. Contains the project files, source code, simulation files. After verification, the actual available.
HDLC_VHDL
- 用VHDL实现从以太网到并行数据以及从并行数据到以太网的HDLC成帧解帧.附详细代码说明,方便阅读.可方面移植到Altera及Xilinx等厂家芯片,是做基于FPGA的以太网设计的好资料-Achieved using VHDL and parallel data from the Ethernet to parallel data from the HDLC framing solution to Ethernet frames. Attached detailed code instructi
DE2usingbook
- ED2中文手册，是哥们买板子时送配的，altera原版，是非常好的器件查询资料-ED2 Chinese Manual, Transmission and Distribution is a buddy bought the board when the, altera original, is a very good device for data access
FFT_128_floating_point
- 基于Altera FPGA 的FFT128浮点运算模块(veriolg HDL+C51) (开发环境：KeilC51+Quartus7.2）-The module of 128 floating-point FFT based on Altera FPGA(veriolg HDL+C51) （Development environment：KeilC51+Quartus7.2）
DDS_generation
- 基于Altera FPGA的DDS 模块 - DDS generation module based on Altera FPGA
cordic
- altera cordic ip core, 包含文档，完整设计，以及测试向量-altera coedic ip core, including the document, whole design, and the testbench.
testbench
- altera 最新的CYCLONE IV的pci-e核的testbench，VHDL源程序。-altera latest CYCLONE IV of the pci-e core testbench, VHDL source code.
usb-blaster
- altera quartusII usb byteblaster转接板原理图以及相应源码-altera quartusII usb byteblaster adapter board schematic and the corresponding source
main_control
- listing program to display a character in DE2 Altera s LCD with keyboard as an input
AlteraFPGACPLD
- 《ALTERA FPGA/CPLD 设计》附带光盘，内有书中案例的源代码及使用说明。-" ALTERA FPGA/CPLD Design" with CD case containing the book' s source code and instructions.
Altera_IPcore
- 15个Altera ip核，大家可以相爱在使用-15 Altera ip
modelsim-using-guide
- modelsim Altera 5.3的使用教程，适合初学者了解第三方仿真工具。-handbook for modelsim Altera 5.3.It is helpful for learning FPGA.
DDR SDRAM Design Tutorials
- Altera公司的基于NIOSII设计DDR和DDR2内存的资料，很有帮助的，-Based on Altera' s DDR and DDR2 memory NIOSII design information, useful,
webserver_c3
- altera fpga embedded processor nios ii design example network