搜索资源列表
protel_altera_pcb_sch_lib
- altera cyclone 系列的protel封装图，layout的哥们有用的~-altera cyclone series of protel package diagram, layout useful ~
FPGA_AD
- 基于 Cyclone EP1C6240C8 FPGA的ADS2807接口程序，主要用来使用FPGA控制ADS2807的采集。 采用FPGA来模拟ADS2807的时序来实现控制功能。 提供采样频率控制、AD通道转换、采样数据缓存等功能。-Cyclone EP1C6240C8 FPGA-based interface program of the ADS2807, ADS2807 is mainly used to control the use of FPGA collection. AD
FPGA_ADDA
- 基于 Cyclone EP1C6240C8的ADS2807，DAC2902 测试程序。主要用来使用FPGA控制ADC采集和DAC的输出，从而达到高频率信号处理的功能。首先从ADC2807采集数据，然后送给DAC2902输出。 采用FPGA口线模拟ADC2807和DAC2902的时序来实现。 提供ADC采样频率控制、DAC输出频率控制、输出波形控制、ADC通道转换、DAC通道转换等功能。-Based on Cyclone EP1C6240C8 of the ADS2807, DAC2902
nios_lcd_3c120
- Cyclone III FPGA Nios II LCD开发程序，包括QuartusII工程及Verilog源码。-Cyclone III FPGA Nios II LCD development process, including the QuartusII engineering and source code.
VGA_v
- 基于 FPGA 的VGA显示控制器设计（采用Verilog 语言） 控制VGA显示模块 VGA_HS,VGA_VS1,VGA_BLANK时序的发生器。包括测试程序 采用ALTERA Cyclone II系列芯片EP2C8Q208C8N芯片测试成功。-module VGA(CLK_50,RST_N,VGA_HS,VGA_VS1,VGA_BLANK, VGA_CLK,VGA_SYNC,VGA_R,VGA_G,VGA_B) input
Bufor
- Circular buffer using a cyclone memory ( Quartus II and VHDL .)-Circular buffer using a cyclone memory ( Quartus II and VHDL .)
EP2C
- cyclone II的开发板原理图和pcb图-development kit sch and pcb file of cyclone II
testbench
- altera 最新的CYCLONE IV的pci-e核的testbench，VHDL源程序。-altera latest CYCLONE IV of the pci-e core testbench, VHDL source code.
zhuangtaiji
- 检测姓名序列的状态机。使用VERILOG编写。平台是QuartusII9.1。Cyclone -Detection of sequence state machine name. Prepared using VERILOG. Platform is QuartusII9.1. Cyclone III
meanFilter
- This is a variable length window averaging filter that uses an MCP3002 ADC with SPI interface to sample an analog input, and has a PWM that can be run through a low-pass filter to produce an analog output. The design was simulated in Modelsim with no
cycloneiii_sb_3c25
- 这是ALTERA 公司Cyclone III的Cyclone III的EP3C25的原理图，对于学习FPGA有很大的帮助。-It is very usefull to learner,which learn Cyclone III-EP3C25,It could help you more easier escape it!
test_006
- verilog LCM test , it use Altera cyclone IV GX bord
Multiplexer
- Source code of multiplexer on VHDL. The compilation is done in Quartus II for Cyclone II.
cyc3_ciii52001
- Cyclone III Device Data Sheet-This chapter describes the electric characteristics, switching characteristics, and I/O timing for Cyclone® III devices. A glossary is also included for your reference
pci32tlite_oc_latest.tar
- pci32 taget core ip, The core has been designed to permit interface between a PCI Master and simple WHISBONE Slaves, and fitting into smallest FPGA (about 200 LC s in ALTERA CYCLONE II FPGA).-pci32 taget core ip, The core has been designed to p
DE2_user_manual_cn.pdf
- altera de2中文手册:de2提供了实用altera cyclone 2开发高级数字产品需要的所有模块.此为对应用户指南,在30分钟里面,可以浏览许多参考设计.-de2 user manual
fpga_cyclone_board_schematics
- Cyclone开发板的原理图，多种可自由选择，自行画板，无密码-Cyclone development board schematics, many designs，drawing board by myself, no password
EP2C8_EP2C8A
- Cyclone II Device Family Data Sheet
ep1c6P80c52
- Altera FPGA cyclone EP1C6 + 80C52 实验板原理图-Altera FPGA cyclone EP1C6+ 80C52 Experiment Board Schematic
cyclone-3.4
- 象棋旋风引擎。支持ucci.给需要朋友。-Chess engine cyclone