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MIL_STD_188_100B_Simulink_Demo
- This application example implements an end-to-end baseband communications system compliant to the US MIL_STD_188_110B intended for long-haul and tactical communications.This model supports four different data rates: 1200bps, 600bps, 300bps and 150bps
reddyestimator
- reddy snr estimator. run the interleaver file first than run the estimator file and get the results.
DRP
- DRP交织器一种新的交织器设计思想，旨在降低低码重码字的相关性-DRP interleaver
Interleave.h
- brief Definitions of interleaver classes
interleaver
- 此代码是cdma2000基带信号处理过程中交织的算法程序。-This code is cdma2000 baseband signal processing algorithms process intertwined.
bpsk
- 基于FPGA的BPSK数字调制器的实现，对于学习通信专业的人应该有些帮助-FPGA-Based Digital Modulator BPSK, for people to learn communication professional should be some help
juanjijiaozhi
- 交织器的matlab 程序 试验可以用-Interleaver can test matlab program
3GPPinterleaver
- 3GPP interleaver 3gpp 交织器 ，混淆输入循序，与LTE可对比 可应用于turbo等编码中-3GPP interleaver 3gpp interleaver, enter the progressive confusion, can be compared with the LTE can be used in turbo coding, etc.
turboEnAndDe
- c语言下turbo码encode和decode加噪仿真过程，其中交织器其一有用到LTE方式，代码粗糙，见谅-c language code encode and decode next turbo plus noise simulation process, which LTE interleaver to form a useful one, code rough, excuse me
turbo
- Turbo code simulation. This code can be compiled on all platforms. The interleaver size is 10000. SNR can be varied according to user s need. However, each time SNR is changed, the code must be recompiled.-Turbo code simulation. This code
deinterleaverwithcertainN
- 在802.16标准下，给定了交织器后，设计出解交织，有关参数，见标准-In std 802.16, deinterleaver is designed with regard to the given interleaver. The parmater concerned is in std.
interleaver_3GPP
- 3GPP标准交织器，南京邮电大学，通信工程系-3GPP standard interleaver
BerrouGlavieux
- this program is a simulation Berrou_Glavieux interleaver
Barrelshifting
- this program is a simulation of Barrel_shifting interleaver
cf_interleaver_9_8
- 9*18交织器的实现。对初学者很有用的，欢迎下载-9* 18 interleaver implementation. Very useful for beginners, are welcome to download
jiaozhijiejiaozhi
- VHDL代码完成行列交织与解交织的功能实现-the realization of interleaver on VHDL language
interlace
- 根据MATLAB中的伪随机交织器产生的交织图案初始化到ROM中，从ROM中读取交织图案对输入数据进行交织。同时也可根据解交织图案进行解交织，同样的算法。-In accordance with MATLAB generated pseudo-random interleaver initialization pattern woven into the ROM, read from the ROM interwoven interwoven pattern of input data. Can a
BCHSim
- BCH(15,11,1)+交织编解码matlab代码-BCH (15,11,1) with interleaver matlab code
Turboencoder
- Turbo Encoder using RSC encoder with interleaver
turboDecoder
- Turbo decoder under awgn channel. -The input is: uncoded bits,coded bits 1,coded bits2(interleaved), LLR from other source(if use only one turbo code ,fill all zero is ok), numbers of iterations, interleaver between two CC, source bit,decoder id(