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how_MIPS_runto_Linux
- 看MIPS跑LINUX－MIPS体系结构剖析.pdf呵呵mips学习的重要资料 不用多说-See MIPS Run LINUX-MIPS architecture analysis. Pdf Hehe mips Needless to say important information to learn
EFI-MIPS-0.3.3.tar
- EFI-MIPS-0.3.3.tar.gz efi for loongson seccore,peicore,dxecore ok-UEFI
mipscpu-source
- mips cpu的实现.MIPS是世界上很流行的一种RISC处理器。MIPS公司的R系列就是在此基础上开发的RISC工业产品的微处理器。这些系列产品为很多计算机公司采用构成各种工作站和计算 机系统。 -mips cpu implementation. MIPS is the world' s very popular as a RISC processor. MIPS company' s R series is based on the development of industr
MIPS
- 做一个类似于8086的单片机，通过使用MIPS的开发方法-Make a similar 8086 MCU development approach through the use of MIPS
microprocessor
- 一个微处理器的Verilog代码，根据英文书籍《数字设计与架构》中的例子而写，能够运行MIPS指令，能正确执行跳转指令。通过modelsim仿真，含测试代码。-Verilog code for a microprocessor, according to the English book " Digital Design and Architecture" was written in the example, to run MIPS instructions to jump
MIPS-C
- 北京航空航天大学，计算机组成原理大作业，设计MIP-c处理器-Beijing University of Aeronautics and Astronautics, great work computer organization, design MIP-c processor
MIPSassembler
- Mips指令汇编器，将MIPS汇编程序转换为机器码。-mips assembler:change mips assembler program into machine code.
mrua_SMP8634_2.8.2.0_dev.mips
- Type make to see available build targets. -Type make to see available build targets.
CPUsourcecode
- 本设计实现了一个具有标准的32位5级流水线架构的MIPS指令兼容CPU系统。具备常用的五十余条指令，解决了大部分数据相关，结构相关，乘除法的流水化处理等问题，并实现了可屏蔽的中断网络。-This design implements a standard 32-bit 5-stage pipeline architecture of MIPS instruction compatible CPU system. Instructions with more than 50 commonly use
PipelineCPU
- Quartus II 7.2环境中，采用硬件描述语言VHDL独立完成了基于MIPS指令集的32位RISC处理器的逻辑设计-quartusII mips pipeline 32bit cpu design
MIPS
- 32位MIPS系列的系统，实现加减乘除与或非等等基本功能-32-bit MIPS family of systems, or non-realization of Math and basic functions, etc.
mips
- cpu---risc---mips源代码-cpu---risc---mips
jz-pm
- jz4750 (mips) linux kernel pm部份suspend/deep sleep + irq微架构-jz4750 (mips) linux kernel pm part of the suspend/deep sleep+ irq micro-architecture
singleCycleProc
- 简化的单时钟循环VHDL处理器.可以运行一些简单的mips指令，例如add, sub, and, or, slt, beq and j. -A simplified single cycle processor in VHDL. This processor can continuously execute some simple MIPS instructions which are lw, sw, add, sub, and, or, slt, beq and j.
mips
- in verilog 8bit mips processor
vhdl-pipeline-mips_latest.tar
- pipeline mips in vhdl
gxemul-0.6.0.tar
- arm ppc mips 等 simulator, 龙芯就用的这个模拟整个系统的-arm ppc mips other simulator, Godson to use this simulation of the entire system
MIPS
- 该文件主要说明了MIPS的一些主要结构和有关这种产品的一些特点-The paper mainly describes some of the main structure of MIPS and some of the features about the product
UBootIntroduction
- 这是嵌入式 PowerPC, ARM 和 MIPS 系统中使用 DENX U-Boot 和 Linux 的 指导手册。-This is the embedded PowerPC, ARM and MIPS systems using DENX U-Boot and Linux guidebook.
mips1
- Mips设计源码及各种资料，便于Mips datapath的设计，非常难得的资料-Design Source Mips