搜索资源列表
SIN_COS
- fpga产生正弦波形,sin_cos,modelsim仿真通过-fpga generate sin waveform,test passed
sin111
- 用ISE与modelsim联合仿真,使用CORDIC算法进行设计,这里使用的是12位的DA,可以生成正弦波,用于在实际电路中生成完整的正弦波(With ISE and modelsim joint simulation, the use of CORDIC algorithm design, used here are 12 DA, can generate sine wave, used in the actual circuit generates a complete sine wave)
BCH_VLSI
- 使用HLS完成BCH编码的运算通路的设计,纯组合逻辑,对于65nm工艺可跑上1GHz。已经组合逻辑分为了多个部分,可在每一个部分之间插流水线。 附上可综合的纯RTL Code以及C++代码,以及Modelsim仿真。 可通过我的优化选项来学习如何优化HLS工具生产的代码。(BCH Encoder realized using HLS tool. Combinational logic.)
FFT64DIF
- 实现64点的快速傅里叶运算,并用modelsim、matlab仿真。(Achieve fast Fourier operations at 64 points, and use Modelsim, matlab simulation.)
seq
- 实现序列检测功能,新手编程,已经在modelsim里检验过了功能完整,内附模块化testbench(Sequence detection function, novice programming)
mult88
- 两个8*8矩阵相乘,每个矩阵内部元素相同,简化运算;modelsim编译仿真,ise或vivado下载,实现FPGA显示。(Two 8*8 matrix multiplication, each element of the same matrix, simplifying the operation; Modelsim compiler simulation, ISE or vivado download, to achieve FPGA display.)
Verilog HDL program
- 文件详细讲述了使用XILINX产FPGA在ISE平台开发的方法,介绍了Modelsim,chipscope,textbench等仿真方法,并含大量实例以及源代码(File details on the use of XILINX produced FPGA in the ISE platform development methods, introduced the Modelsim, chipscope, textbench and other simulation methods, and
fir
- MATLAB设计fir数字滤波器 , 结合modelsim软件仿真。(MATLAB design FIR digital filter)
自己动手写CPU
- ? Code文件夹 提供了本书每一章涉及的OpenMIPS源代码、测试程序。 ? Tools文件夹 提供了GNU工具链的安装文件,以及一个小工具Bin2Mem.exe,该工具用来将二进制数文件转化为可以用于ModelSim仿真的格式。 ? Doc文件夹 提供了本书使用的一些IP核的说明手册,包括UART控制器、SDRAM控制器、GPIO模块等。还提供了FPGA开发平台DE2的说明手册。(Code folder Provides the OpenMIPS source code and
FM
- MATLAB仿真 FM调制和解调过程,并把解调出来的数据写入文本,方便quartus和modelsim仿真调用(MATLAB simulation FM modulation and demodulation process, and the data written into the text of the demodulation, to facilitate the quartus and Modelsim simulation calls)
m.e.n.t.o.r._.k.e.y
- License Key Generator for Mentor Modelsim Product
FourToOneMux
- this is Implementation of 4 to 1 Multiplexer in verilog language for embedded design systems
bingo_spi_test
- 利用SPI实现FPGA和外设之间的通信。经过Modelsim仿真验证。(为FPGA设计技巧与案例开发详解一书源码)(Using SPI to implement communication between FPGA and peripheral. After Modelsim simulation verification. (for FPGA design techniques and case development detailed explanation of a book source
DES_Core
- 基于Quartus ii 平台的DES加密算法Verilog设计和modelsim仿真(DES encryption algorithm design and Modelsim simulation based on Quartus II platform)
2F
- testing testbench to device under test (dut)
pidd
- verilog实现增量式PID算法,实测可用,带modelsim仿真(PID algorithm by verilog)
BtoC
- 文件中有两种方法实现并串转换模块代码的编写,可以在modelsim软件中正确仿真(There are two methods in the file to achieve the serial conversion module code writing, can be correctly simulated in Modelsim software)
dds6_ise12migration
- 以DE2为开发平台,采用Veriolg语言编程,实现了DDS信号输出,频率,步进,波形输出均可调,采用Modelsim以及FPGA内嵌逻辑分析仪验证设计的正确性,可以满足一定的工程需求。(With DE2 as the development platform and Veriolg language programming, the DDS signal output, frequency, step and waveform output can be adjusted. The corre
spi_no_cs_13
- FPGA作为从机与STM32的全双工通信,FPGA将接收到STM32的数据返回到STM32,Modelsim仿真和板子仿真都通过(Use FPGA as slave,realize the communication between FPGA and STM32. The function has been tested is no problem.)
16-Bit_RCA
- 16 bit Ripple Carry Adder using vhdl on modelsim