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uart16550
- Implementation of the UART 16550 model with verilog langugue
sim_uart
- uart 收发器 verilog 代码，实现自收发功能 sys clk = 25m, baud 9600 停止位1， 无校验位； 代码实现了串口自收发功能，及把从 PC 收到的内容都发送会 PC, 其他波特率，自行修改代码即可，在 alter 的FPGA 上调试通过； -verilog code uart transceiver to achieve self-transceiver function sys clk = 25m, baud 9600 1 stop bit, no par
RS232
- It s combination logic for UART. Edited in verilog-HDL.
uart
- uart IP CORE Verilog quartus-uart IP CORE Verilog quartusii
Verilog-UART
- UART With Verilog Unit for Transmission Unit for Reception
verilog
- 这是一个uart串口实现16550的实现，代码已测试过了。-This is a 16550 uart serial port, the code has been tested before.
uartverilog
- 用verilog语言编写uart程序。模拟串口时序进行收发数据操作。-verilog uart
uart-
- 通用异步通讯UART的工程文档，ISE打开工程，里面有VERILOG的源代码，可以编译通过-UART Universal Asynchronous communication engineering documents, ISE open the project, which has VERILOG source code can be compiled
UART
- verilog 串口模块，高度集成，下载下就能用-verilog uart communication,easy use
UART
- xilinx官网提供的VHDL,UART串行通信模块，肯定好用，官方提供-xilinx official website provides VHDL, UART, FPGA communication module is certainly easy to use, official
FPGA_UART
- 用Verilog语言实现的FPGA UART独立收发模块 思路简单，代码简洁。在Lattice LFE3EA VERSA开发板上验证通过,编译器Lattice Diamond. 功能：串口收到数据后立即回传，此后每一秒串口数据+1再发送。-Using Verilog language independent of FPGA UART transceiver idea is simple, concise code. Development board in Lattice LFE3EA
uart
- 用verilog编写的uart代码，比较适合初学者练练手，包含初始化，收发等模块-Written code with verilog uart, more suitable for beginners practice your hand, including initialization, sending and receiving modules
Verilog-uart
- Verilog状态机实现的串口串口收发模块 -Verilog state machine for uart
verilog-UART-Controler
- 使用verilog语言实现的UART控制器，包含发送和接收部分，波特率可调。-Using the UART controller verilog language, including sending and receiving part, the baud rate is adjustable.
mini-UART
- URAT资料，用verilog HDL编写，具有完整的信号描述和功能-URAT data write complete signal descr iption and function, with verilog HDL
UART
- verilog写的串口程序，其功能完全最正确，带工程文件-verilog to write the serial program, its function is completely the right, with the project file
UART
- verilog实现UART，分模块实现，希望对大家有所帮助-verilog-- UART
uart
- verilog uart串口通讯程序设计 带个模块详细设计 及说明文档-Verilog the uart serial communication program design with the detailed design and documentation of a module
uart
- FPGA上的verilog 的uart实现方法-FPGA on the verilog uart implementation
UART-by-Verilog
- 用Verilog实现UART，并且附有详细说明那个-The Verilog UART, and with the detailed descr iption that