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Xilinx新一代FPGA设计套件Vivado配套资料
- verilog经典教程，入门者的必选书籍，非常实用，可以学习到很多的知识(verilog classic tutorial, entry must be books, very practical, you can learn a lot of knowledge)
pg007_srio_gen2
- FPGA手册，xilinx 的srio官方手册，仔细阅读(FPGA manual, Xilinx sRIO official manual, read carefully)
mys-xc7z020-trd
- Zturn Board verilog source. Headless.
mys-xc7z020-lcd-xylon
- Zturn board verilog source with LCD driver.
mys-xc7z020-arm-hdmi-xylon
- Zturn board verilog source with HDMI driver.
gpio_axi
- Zturn board - GPIO - AXI
virtex7_pcie_dma_latest.tar
- PCIE_dma 设计，基于xilinx virtex7 fpga芯片，实现高速传输(PCIE_dma design, based on the Xilinx virtex7 FPGA chip, to achieve high speed transmission)
10_rom_test
- 讲解赛灵思Spartant_6系列FPGA的ROM IP核的调试过程，供大家参考学习(Explain Xilinx Spartant_6 Series FPGA ROM IP core debugging process, for your reference learning)
ug835-vivado-tcl-commands
- Vivado是Xilinx最新的FPGA设计工具，支持7系列以后的FPGA及Zynq 7000的开发。与之前的ISE设计套件相比，Vivado可以说是全新设计的。无论从界面、设置、算法，还是从对使用者思路的要求，都是全新的。看在Vivado上，Tcl已经成为唯一支持的脚本，此文件是vivado是tcl命令的集合。(Vivado is Xilinx's latest FPGA design tool that supports development of FPGAs and Zynq 7000s
microblaze实例教程
- 一般而言，Xilinx Microblaze会被用来在系统中做一些控制类和简单接口的辅助性工作，比如运行IIC、SPI、UART之类的低速接口驱动，对FPGA逻辑功能模块初始化配置及做些辅助计算等等。类程序的代码量普遍不大，常常在十几KB到几时KB之间，因此对存储的需求通常也不是太高，使用FPGA内部RAM资源便已经够用(Generally speaking, Xilinx Microblaze will be used to do some auxiliary work of control
xapp794
- 里面分为八个实验，一步一步教你使用system genertor for dsp 生成能供vivado使用的IP核文件。(It is divided into eight experiments, which teach you to use system genertor for DSP step by step to generate IP core files that can be used for vivado.)
HK-2+blood type
- 输入血型，进行匹配与判断，检测是否与受血人的血型匹配，无安全隐患，可以进行输血(Blood type input, matching and judgment, detection and blood type of the recipient of blood matching, no safety risks, blood transfusion can be carried out)
tx
- 一个用verilog实现的HDMI发送器，已在XILINX的7系列FPGA上验证(A HDMI transmitter implemented by Verilog has been verified on XILINX's 7-series FPGA)
defog
- 图像去雾算法FPGA实现，使用xilinx Vivado开发环境(Image dehazing algorithm FPGA implementation using xilinx Vivado development environment)
基于basys3的推箱子游戏
- 基于FPGA的游戏实例，开发板为Xilinx的basys3，VGA显示(Basys3, VGA Display of Xilinx Development Board Based on Game Example of FPGA)
AWB
- 基于Xilinx的FPGA图像增强，对图像进行预处理，自动白平衡(FPGA image preprocessing, automatic white balance)