minimum uart Image for transfer image to FPGA then read again by PC

选用一种设计方案定制ROM（乘法器宏模块）的方法设计一个八位乘法器，利用quartus软件进行VHDL程序的编写，然后对程序进行仿真验证，并对所设计的乘法器进行评价。-Use a custom ROM design ( multiplier macro module ) method to design a eight multiplier, the use of quartus software VHDL program, then the program is validated by si

project on huffman coding using vhdl

VHDL编程 out std_logic -- Transmitter control DataBits in st(VHDL programming out std_logic - Transmitter control DataBits in st)