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DSD_assignment
- FPGA作业,宦飞主讲老师,上海交通大学-FPGA operations, official flying speaker teachers
Assignment-3
- assembly 语言作业 电梯-assembly language assignment- elevator
main
- 嵌入式系统开发大作业例程,电梯模拟代码,只给出了main函数部分,需要的朋友可以用这个代替软件中的例程keyboard.dsw中的main部分。-Embedded system developing your work routines, elevator simulation code, give only a main function, need friends can part with this instead of in the software of routines. The m
ReadFsm
- VHDL小程序,read FSM。可以作为VHDL一次作业使用。包含测试文档testbench。-VHDL applet, read FSM. A job can be used as a VHDL。VHDL code and testbench.
qianrushi
- 嵌入式大作业,电子时钟、万年历,12位LED程序-Embedded large operations, electronic clock, calendar, 12 LED program
homework
- 天祥开发板Tx-1c的视频留下的课后作业,比较全。-Tianxiang development board Tx-1c of the video leaving the after-school jobs, more whole.
danpianji001
- 基于单片机的交通灯控制系统。里面有程序和资料,是我的课程作业,经仿真测试有效,对单片机学习有很大帮助,参考价值有不错。-Microcontroller based traffic light control system. There are programs and data, my course work, the simulation test the effect of single-chip learning of great help, there is a good referen
LCDhomework
- 1602液晶显示作业,用1602写秒表程序-homework for 1602
rili
- TC下写的简单万年历程序,输入年份 分段返回全年的日历,很简单,初学者交作业用 呵呵。 1582年10月15日 教皇格列高利十三世正式颁行格里历,以取代儒略历。(这一天是以公历定义,其中公历1582年10月5日至14日不存在,星期换算公式对之前不适用) 所以选取了一个1582年之后的参照点,本程序是以1900年1月1日作为参照点的。 -TC to write a simple calendar program, enter the calendar year annual retu
123
- 单片机时钟作业程序,附带说明以及初始化程序-MCU clock operating procedures, and the initialization procedure annotated
Computer-Architecture-lab1
- 计算机组成实验作业1,fpga开发板,verilog语言编写-Composition of experimental computer operating 1, fpga development board, verilog language
Computer-Architecture-lab2
- 计算机组成实验作业2,fpga开发板,verilog语言编写-Composition of experimental work computer 2, fpga development board, verilog language
Computer-Architecture-lab3
- 计算机组成实验作业3,fpga开发板,verilog语言编写-Composition of experimental computer operating 3, fpga development board, verilog language
Computer-Architecture-lab4
- 计算机组成实验作业4,fpga开发板,verilog语言编写-Composition of experimental computer operating 4, fpga development board, verilog language
Computer-Architecture-lab5
- 计算机组成实验作业5,fpga开发板,verilog语言编写-Composition of experimental computer operating 5, fpga development board, verilog language
Computer-Architecture-lab6
- 计算机组成实验作业6,fpga开发板,verilog语言编写-Composition of experimental computer operating 6, fpga development board, verilog language
digital_clock
- verilog digital clock.四位 有计时器 有秒表 。是学生作业。 原创。 适合初步学习verilog的学生。 -verilog digital clock/4 bits/ up_down/stopwatch
display_combine
- 这是学生做的Verilog HDL 作业。 是一个数字钟。 有时钟,秒表等功能。 原创。-This is the Verilog HDL students to do the job. Is a digital clock. A clock, stopwatch and other functions. The original.
ARM
- ARM上海交通大学嵌入式课程的课后作业,ADS-Shanghai Jiaotong University, embedded ARM homework program, ADS, etc.
homework1
- 清华大学微电子所研一的IC设计与方法第一次作业,由张春老师主讲。-Tsinghua University