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PL3106_PLM.rar
- PL3106集成了52单片机,它具有电力线载波功能。本程序就是3106的载波发送和接受程序,PL3106 integrates 52 microcontroller, it has the power line carrier functions. This program is 3106 carrier to send and receive procedures
DSP2
- DSB-SC信号的生成与解调 1) 用离散(DSP)的方法生成DSB信号 2) 载波频率为150KHz,音频为500Hz和2000Hz的混合音。 3) 加入高斯白噪声 (4) 语音信号 的传输。 改变抽样频率和量化台阶大小,观察重建信号以及量化噪声信号的波形;对于语音信号主观评价声音质量的变化。 -DSB-SC signal generation and demodulation 1) Discrete (DSP) methods to generate
gps_tracking
- 澳大利亚新南威尔士大学研究的GPS接收机的FPGA跟踪模块的.v程序,包括载波跟踪环路、码跟踪环路、通道累加等模块。-The University of New South Wales, Australia, the study of the FPGA tracking GPS receiver module. V procedures, including the carrier tracking loop, code tracking loop, the channel accumulati
F2812_SPWM
- F2812产生SPWM波。(CCS3.3开发环境下)EVA下的通用定时器T1工作于连续增/减计数模式,产生三角载波,载波频率为3000Hz,载波比N=60,因此调制波形正弦波的频率为50Hz。本实验中,调制度为0.8。-F2812 generating SPWM wave. EVA work under the general-purpose timer T1 in a row up/down counting mode, resulting in triangular carrier, the
SPWM
- 详细的SPWM原理说明,并使用TMS320F2812产生SPWM波,时钟频率为150Mhz,载波比为360,每一度采样一次--SPWM principle of detailed instructions,SPWM wave generated using the TMS320F2812, the clock frequency of 150Mhz, carrier ratio of 360, each unit of sampling time
PL_3150_DSK_4L2S_TX2_1_A
- 美国埃施朗PL3120模块版本1,电力线传输模块,内含PCB(请用PADS或PCAD或AD09打开)及原理图,电力载波技术的福音,中文网上仅此一份-U.S. Echelon PL3120 module version 1, power line transmission module, containing PCB (please open the PADS or PCAD or AD09) and schematic, power line carrier technology, the Go
th_sv_335
- 在dsp28335上实现PWM载波调制算法,三电平spwm-In dsp28335 achieve PWM carrier modulation algorithm, three-level spwm
DEMO3106
- 基于PL3106载波芯片电力猫的驱动源码,用keil C51开发,带CRC校验,点对点抄收距离500米。-Based on PL3106 chip, electric cat carrier driver source code, using keil C51 development, with a CRC check, point-to meter reading distance of 500 meters.
CC1101
- 用msp430fg4619驱动CC1101,作为主机实现多点之间的半双工通信。完成主机的广播功能完成显示功能. 用msp430g2221驱动CC1101,作为从机节点,具有中继转发功能 完成对主机广播的响应及转发完成数据的发送和对来自从机数据的转发完成载波检测-Between multi-point half-duplex communication with CC1101 of msp430fg4619 drive, as the host. Complete the host broa
costas
- 载波同步,costas环,基于Verilog的载波同步环-Carrier synchronization, costas ring, based on Verilog carrier synchronization ring
microcontroller
- 本系统以51单片机为控制核心,由正弦信号发生模块、功率放大模块、调幅(AM)、调频(FM)模块、数字键控(ASK,PSK)模块以及测试信号发生模块组成。采用数控的方法控制DDS芯片AD9850产生0Hz-30MHz正弦信号,经滤波、放大和功放模块放大至6v并具有一定的驱动能力。测试信号发生模块产生的1kHz正弦信号经过调幅(AM)模块、调频(FM)模块,对高频载波进行调幅或调频。二进制基带序列信号送入数字键控模块,产生二进制PSK或ASK信号,同时对ASK信号进行解调,恢复出原始数字序列。
AM
- FPGA内AM调制工程。内带调制波、载波生成。关键词:FPGA verilog AM DDS-AM modulation works within the FPGA. Within the band modulation wave generated carrier. Key words: FPGA verilog AM DDS
laowai
- 采样法生成三相SPWM波的开环调速控制程序载波频率为20KHz,或载波周期为50μs。DSP晶振10MHz,内部4倍频,时钟频率为40MHz,计数周期为25ns。假设调制波频率由外部输入(1~50Hz),并转换成合适的格式-Sampling method to generate three-phase SPWM wave open-loop speed control procedures for the carrier frequency 20KHz, or carrier period is
PLCi36M-III
- PLCi36M-III低压电力线载波数据通道芯片(DL/T645-1997/2007协-PLCi36M-III low-voltage power line carrier data channel chip [DL/T645-1997/2007 Association
DDSI16P
- 单相载波表 DDSI16(V5.22)-Single-phase Carrier Table DDSI16 (V5.22)
C51-PL3105
- 51兼容载波通信单片机PL3105 的通信软件设计-51 single-chip carrier communication PL3105 compatible communications software design
Simulation-and-FPGA-Implementation-of-DigitalDBPSK
- 文章介绍了系统的硬件电路原理与具体实现方法,其中主要包括载波恢 复电路,PN 码捕获电路和跟踪电路,并针对Xilinx 公司FPGA 的特点,对各电 路的实现进行优化设计,在不影响系统稳定性和精度的前提下,减少硬件资源 消耗,提高硬件利用率。设计利用Verilog 硬件描述语言完成,通过后仿真验证 电路正确性,并给出综合结果。-This paper introduces the system' s hardware circuit principle and the spe
msp430_cdma
- 用单片机实现(载波监听/冲突检测)的功能,用的是MSP430芯片来实现。分为主机和从机两个程序-a c language for mcu.
ir_rx_tx
- 用89S51做的红外编码解码程序。载波用555做-89S51 do with the infrared codec procedures. Carrier to do with 555
16qam——modulation
- verilog编写的16qam调制程序,将所有东西装入工程,运行mmm16主程序。其中载波为一个周期采十个点,并乘以2^8-1取整数。在quartusII运行通过。-verilog modulation procedures 16qam prepared all things into works mmm16 to run the main program. One carrier for a cycle of 10 points taken, and multiplied by an inte