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divide
- 除法器-Divider
emc_computor
- 2字节除以1字节；3字节除以2字节的【除法子程序】,台湾义隆单片机的代码。-2 bytes divided by the number of 1 byte 3 bytes divided by 2 bytes of Subroutine] [division, Taiwan Microelectronics MCU code.
baweichufaqi
- 介绍了利用VHDL实现八位除法,采用层次化设计,该除法器采用了VHDL的混合输入方式,将除法器分成若干个子模块后,对各个子模块分别设计,各自生成功能模块完成整体设计,实现了任意八位无符号数的除法。 -Introduced the use of VHDL to achieve eight division, the use of hierarchical design, the divider using VHDL mixed-input methods, will be divided in
divide
- Verilog hdl语言的常用除法器设计，可使用modelsim进行仿真-Commonly used languages Verilog hdl divider design, can use the ModelSim simulation
ps
- RS(204,188)译码器的设计 异步FIFO设计 伪随即序列应用设计 CORDIC数字计算机的设计 CIC的设计 除法器的设计 加罗华域的乘法器设计-RS (204188) decoder design of asynchronous FIFO design application design sequence was pseudo-CORDIC design of digital computer design CIC divider design Le Hua
Divider
- 一个用vhdl硬件描述语言实现的一个比较简单的除法器-an divider using vhdl
double_subc
- Verilog 下 16位除法算法程序，高精度，固定17个时钟周期-Verilog under 16 division algorithm procedures, high-precision, fixed in 17 clock cycles
Low-power
- 1.通过键盘、LCD来进行超低功耗实验 2 在一段时间内，如果用户没有进行按键操作，系统将进入“睡眠”－－低功耗状态 3 用户按键后，系统从低功耗状态转到正常的工作状态 4 在非低功耗状态下，程序接收键盘按键执行加法器操作(因为键盘和LCD限制不能实现复杂 5 的功能,如乘法、减法、除法等）.-1. Through the keyboard, LCD for ultra low-power experiment 2 over a period of time, if the us
VHDL
- VHDL的4bit*4bit的有符号无符号的乘法除法实现-VHDL unsigned signed to achieve the multiplication division
yuanjian
- 51单片机多字节乘除法，采用标准ASM语言，以子函数的格式，可随便调用-51 single-chip multi-byte multiplication and division, the use of standard language ASM to Functions format, can be readily called
cpu(FinalWithYS)
- verilog实现的八位CPU，包括乘法、除法以及多种寻址方式。代码中包括测试模块，可以直接在试验箱上运行。-verilog to achieve the eight CPU, including multiplication, division, as well as addressing a variety of ways. Code, including test modules, can be run directly in the chamber.
div32_32
- Holtek应用篇 HOLTEK实用子程序之32位除法程序-Holtek practical application HOLTEK Subroutine Part 32 of the division process
chengxu
- 常用的单片机子程序库： 目前已有若干版本的子程序库公开发表,它们各有特色。本程序库中的开平方算法为快速逼近算法,它能达到牛顿迭代法同样的精度,而速度加快二十倍左右,超过双字节定点除法的速度。-Single-chip common subroutine library: there are a number of versions of the subroutine library published, they have their own characteristics. Library in
jsq
- 键盘输入，1062lcd显示，加法、减法（负数不行）、乘法、除法器（若是减法、乘法、除法需先加一次。。。） 初学所写，不足请改进。-Keyboard input, 1062lcd showed that addition, subtraction (not negative), multiplication, division browser (if subtraction, multiplication, division to be added to a...) Beginner boo
quartus2-1
- QuartusII编程设计一款基于FPDA/QuartusII的计算机部件,可以实现算术运算(加,减,自加1,自减1,乘法,除法)和逻辑运算(与,或,非)等功能!-Based on a QuartusII Programming FPDA/QuartusII the computer components can be achieved Arithmetic (add, subtract, from plus 1, since the minus 1, multiplication, divis
HG_chufaqi_clajiafaqi
- VHDL基-16位的无符号除法器，超前进位加法器可改位数。-VHDL-based-16 bit unsigned divider, CLA can be the median.
yong_ding_dian_DSP_shi_xian_chu_fa
- 用定点DSP实现除法,并用包含汇编的具体实现方法-Using fixed-point DSP to achieve division, and use that contains a compilation of the specific implementation method
chengfaqi
- 乘法器,实现了乘法和除法的功能,能够进行32位的运算-Multiplier to achieve the functions of multiplication and division to carry out 32-bit computing
HEXtoBCD
- 在目前所发表的十六进制转化成BCD码的处法中，一般都采用移位相加的方法，其计算过程都比较费时，不适宜很多场合，且很多不适宜C语言调用。而在C语言中，有些初学者用求余的方法来做这种运算，造成程序十分臃肿。下面这段程序仿照竖式除法来进行运算，速度超快。-Published in the current hex code into a BCD at law, in general, have adopted the method of shifting the sum of its calculati
123
- 各种代码运算：多字节ＢＣＤ码减法、多字节ＢＣＤ码取补、多字节ＢＣＤ码左移十进制一位（乘十）、多字节数乘10子程序 多字节无符号数出除法子程序、双字节二进制无符号数乘法-Operation of various code