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Motion JPEG Demo on TMS320DM6446
- This application report describes how to build a motion JPEG demo running on Texas Instruments DM6446 processor leveraging the JPEG codec combo and XDC tools provided with the DM6446 DVEVM/DVSDK package. The demo is derived from the motion JPEG de
JPEGDSP.rar
- 在TI dsp6000系列开发的jpeg压缩程序，以c作为开发语言，对jpeg的代码移植到dsp平台进行数字信号处理的实现,TI dsp6000 series in the development of jpeg compression procedures to c as the development of language, the code of jpeg transplanted to dsp digital signal processing platform for the rea
Chapter10
- 第十章的代码。 本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相
image642-jpeg-network
- DM642 bios TCP/IP源代码-DM642 bios TCP/IP source code
TI_motion_jpeg
- TI公司的基于DSP实现的Motion JPEG源代码，网络传输部分很有参考价值。-TI DSP-based implementation of the company' s Motion JPEG source code, network transmission part of the great reference value.
oc_mkjpeg
- Pure hardware JPEG Encoder design. Package includes vhdl source code, test bench, detail design document. Written in VHDL. Verified on Xilinx XC4VLX25. Rncode 320x240 bmp picture in 3ms at 50 quality, 100Mhz clock.-Pure hardware JPEG Encoder design.
Chapter6-9
- 第六章到第九章的代码 本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例
jpeg
- 这是一个JPEG的编解码的VHDL程序代码-This is a JPEG codec the VHDL code
jpeg
- JPEG(Joint Photographic Expert Group,联合摄影专家组)编码的数据执行解压缩的各项功能.JPEG的VHDL实现代码-JPEG (Joint Photographic Expert Group, Joint Photographic Experts Group) encoding of data to implement the various functions of decompression. JPEG realization of VHDL code
DCT
- ARM汇编，实现DCT算法，图像压缩，JPEG 需要loadmemory，里面附带load文件示例以及样子图片，raw格式-ARM compilation and realizing DCT algorithm, image compression, JPEG need loadmemory, incidental load inside sample documents, as well as look like picture, raw format
jpeg_decoder
- jpeg图像文件软件解码器的arm版本的源代码程序-jpeg image file decoder software arm version of the source code program
Mars_EP1C6F_Fundermental_demo(Verilog)
- FPGA开发板配套Verilog HDL代码。芯片为Mars EP1C6F。是基础实验的源码。包括加法器、减法器、乘法器、多路选择器等。-FPGA development board supporting Verilog HDL code. Chips for the Mars EP1C6F. Are the basic source experiment. Including the adder, subtraction, and multiplier, such as MUX.
CE150_JPEG_Entropy_Coding
- 说明：该代码是一个使用DSP库函数变量进行JPEG编码的简单应用范例。开发环境：用MPLAB C30编译，用ICD2在线调试和编程。-Descr iption: The code is a variable using the DSP library functions to the simple application of JPEG encoder example. Development Environment: The MPLAB C30 compiler, the ICD2 debug
jpegVerilog
- FPGA实现jpeg Verilog源代码-FPGA realization of jpeg Verilog source code
project4Xilinx
- vga code for xilinx
jpegviewer
- this source code is jpeg-viewer in ce5.0 it need to COM, JPG DECODER in pb5.0
c6400_ptimize_Code
- h263,jpeg,mpeg2编解码核心程序,c6000下的代码优化，编译通过的。(TI DSP C64xx)-h263,jpeg,mpeg2 encode/decode core code TI DSP C64xx)
JPEGARM
- JPEG解码源代码，用于ARM开发平台，-JPEG decoder source code for the ARM development platform
mini2440-jpeg
- 此为友善之臂mini2440开发板，采集jpeg图片源码，经验证可用，分辨率要大于240*320，小于480*640，在tmp下生成1.jpg-mini2440 capture jpeg source code very good。
jpeg-codec-in-verilog-HDL
- jpeg codec in Verilog HDL.-jpeg Code decoding used by Verilog HDL。