搜索资源列表
adder4
- 为初学者准备的quartus语言例子，很有用的，也很简单-For beginners quartus language examples
pinlvji
- 基于VHDL的频率计，quartus工程，分模块设计-VHDL-based frequency meter, quartus project, sub-module design
sixuanyi
- 基于Quartus II设计一款计算器通过数码管显示-Quartus II design a calculator based on digital display by
UART_Quartus_verilog
- 用Verilog编写的异步串口通信程序，开发环境为Quartus II，具有一定的参考价值。-Written in Verilog asynchronous serial communication program development environment for the Quartus II, with some reference value.
weitb
- 在数字通信中，通常直接从接收到的数字信号中提取位同步信号，这种直接法按其提取同步信号的方式，大致可分为滤波法和锁相法。锁相法是指利用锁相环来提取位同步信号的方法，本设计方案就是基于锁相环的位同步提取方法，能够比较快速地提取位同步时钟，并且设计简单，方便修改参数。采用Quartus II设计软件对系统进行了仿真试验，并用Altera的Cyclone II系列FPGA芯片Ep2c5予以实现。-In digital communication, usually from receiving direc
i2c_ctrl
- 程序是用VHDL语言在quartus开发环境中实现的I2C通信的源代码-VHDL language program is the development environment in quartus I2C communication to achieve the source code
lcd_ctrl
- 程序是用VHDL语言在quartus开发环境中实现的led显示的源代码-VHDL language program is a development environment in quartus implemented led display source code
usb
- 程序是用VHDL语言在quartus开发环境中实现的usb驱动的源代码-VHDL language program is a development environment in quartus implemented usb driver source code
test_sdram
- 对SDRAM进行读写，工程内部分为PLL以及复位处理模块、写SDRAM逻辑模块、读SDRAM逻辑模块、SDRAM读写封装模块、读写缓存FIFO模块、串口发生模块等。工程基于altera的Quartus II 10.1进行设计，使用更高版本的软件均可。-SDRAM read and write for the project is divided into the internal PLL and reset processing module, SDRAM write logic block,
ADSP2011Local
- pci9054芯片本地总线控制示例程序，可用于pci驱动和应用程序的测试。每隔一段时间产生一次中断，产生1，2，3等递增数据，配合pci9054驱动和应用程序完成数据传输 2.说明：文件夹内是Quartus 9.0的工程文件，使用Verilog语言。-pci9054 local bus control chip sample program can be used for pci driver and application testing. Generate an interrupt at r
task22constant
- 清华大学电子课程设计：Verilog语言，Quartus可以正确运行，下载到FPGA上可完成PC与FPGA一串数据的连续收发，且实现本地回环，异步串口通信-Verilog language, Quartus can be correctly downloaded to the FPGA to be completed by PC and FPGA transceivers continuous string of data, and implement local loop, asynchron
top
- 我自己设计的，在大学课程《数字逻辑》后面的八大实验之一的车灯实验,在quartus上设计的-that is a program about lights-controling of car
verilog_Common_arithmetic
- 常用逻辑运算，加法器，乘法器及除法器的verilog语言，可用modelsim或Quartus II 9.0环境-Common logic operation, adder, multiplier and divider verilog language, can be used modelsim or Quartus II 9.0 environment
dtrigger
- 常用触发器——D触发器的VERILOG语言描述，可用Quartus II 9.0 和modelsim环境实现。-Common triggers- D flip-flop of VERILOG language descr iption available Quartus II 9.0 and modelsim environment to achieve
DE2ban70foudianyuansuan
- 自定义指令进行运算,比较性能，开发环境为quartus。开发板为DE2-70-Custom instructions for operation, comparative performance, development environment for quartus.
Quartus-II-10.1-Handbook--Volume-3
- design debugging of VHDL-the design of limited status in VHDL
C_8255_PortPCnotcorrect_Compiles
- I8255_C_Quartus compatible QAR database-I8255_C_Quartus Quartus compatible QAR database
CPU8085
- Intel 8085 CPU in Quartus II. Compiles saved in Quartus restore database xxx.qar
fenpingjiVHDL
- 基于VHDL语言的分频计，QUARTUS II环境-Based on VHDL frequency meter, QUARTUS II environment
DFF_BDF
- D触发器设计图形输入法,设计软件quartus-Input D flip-flop design graphics, design software quartus