搜索资源列表
MpZBeeV1.0-3.3
- MicroChip Zigbee协议栈开源代码，版本1.0-3.3，支持coordinator\\router\\rfd。-MicroChip Zigbee protocol stack source code versions 1.0-3.3, support coordinator \\ router \\ Cfd.
Zigbee-WSN
- 本代码为Jennic公司芯片JN5121，基于Zigbee协议栈的无线传感网络，包含有Coordinator和Router的源代码，可以所有设备形成一个Mesh网。最大的路由深度为10级，最大节点数为2万。-code for the Jennic JN5121 chip companies, Zigbee protocol stack based on wireless sensor networks Coordinator and contains the source code Router
c3eth
- 这是交换机或路由器的交换软件部分，具有实用价值-This is the switch or router software part of the exchange, has practical value
cli_cmdPro
- 可以作为路由器交换机设备的远端shell控制接口，方便远程管理-router can be used as a remote switching equipment shell interface to facilitate remote management
hack
- 破解无线路由密码软件,绝对可以用，放心下载-Wireless router password cracking software
router
- 用IAR开发的ZIGBEE网络路由例子，用的是ti协议栈1.4.2. 主要功能有能发起路由，能应答。能跨网传数据-IAR development with ZigBee network routing example, using a ti protocol stack 1.4.2. The main functions can be initiated routing, can answer. Inter-network data can Chuan
WSN_Router
- WSN-ROUTER,JENNIC实例程序-WSN-ROUTER
RotSim
- Basic router simulator.
IngressRouter
- has th code if an ingress router that sends packets of data between 2 computers connected via a LAN
xapp655
- xapp655 from xilinx website: Mixed-Version IP Router (MIR) in Verilog
crossroute-R4
- As integrated circuits are migrated to more advanced technologies, it has become clear that crosstalk is an important physical phenomenon that must be taken into account. Crosstalk has primarily been a concern for ASICs, multi-chip modules, and
vxWork20RIP.Router.Programming.Document
- vxWork20RIP Router Programming Document vxWork20RIP路由器编程设计文档-vxWork20RIP Router Programming Document
Router
- demo router zigbee 2006
VMM_example
- This is a VMM example System Verilog written for a router DUT-This is a VMM example System Verilog written for a router DUT
ALLEGRO-PCB-ROUTER
- Cadence Allegro印制电路板布线器，作为Allegro系统互连设计平台的一个部分，是市场上领先的用于自动或者交互式互连布线的解决方案。设计用于应对各种布线挑战，从简单的设计到需要复杂、高速设计规则的高密度印制电路板，Allegro印制电路板布线器应用功能强大的基于形状的算法以求最高效地使用设计布线面积。结果提高了设计效率的同时还缩短设计周期。-Cadence Allegro PCB Router, Allegro system interconnect design platform
Router-Switcher-power-saving
- 路由器自动开关机省电 由廉价的AT89S52单片机作为控制采集芯片，控制三组定时开关机时间，并且能断电保存用户信息长达五年之久，路由器的控制由单刀双掷开关实现，而且无需另加电源，只须由路由器电源提供。本装置配有人性化操作界面，采用DS1602背光液晶，实现三组开关机时间显示和实时时钟显示。-Router Switcher power saving
router
- Hi this is ROUTER code by using system verilog please go through it
Router
- 5 Pin Router with Virtual Output Queues 32 bit arbiter optional encoder and decoder also included along with priority encoder-5 Pin Router with Virtual Output Queues 32 bit arbiter optional encoder and decoder also included along with priority encode
Coding Files
- Through this paper our attempt is to give a onetime networking solution by the means of merging the VLSI field with the networking field as now a days the router is the key player in networking domain so the focus remains on that itself to get a good
5.44业务配置
- 是一种常用的router acl配置，就是一种常用的router acl配置(It's a common router ACL configuration, a common router ACL configuration)