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ps2interface
- this a fpga sparttan 3e based project in which i have made a game based on vga interface . this file is the supporting file for ps/2 interface .-this is a fpga sparttan 3e based project in which i have made a game based on vga interface . t
keyb
- this a fpga sparttan 3e based project in which i have made a game based on vga interface . this file is the supporting file for keyboard interface and it also included a intro.vhdl file required for the startup animation file.-this is a fpga spa
IIR
- 实验说明： 本次实验实现一个IIR滤波器，并在ISE里面仿真。 project目录里面是工程-Experiment descr iption: this experiment to achieve an IIR filter, and the ISE inside the simulation. \ rtl directory which is the source file \ project directory which is the project
uart
- 程序说明: 本次实验控制开发板上面的串口，与PC机进行通信，并在串口精灵里面显示字符。 目录说明: 工程在\project文件夹里面 源文件和管脚分配在\rtl文件夹里面 下载文件在\download文件夹里面,.mcs为PROM模式下载文件,.bit为JTAG调试下载文件。-Procedure Note: The experimental control development board above the serial port to communicate wit
usb
- 程序说明: 本次实验控制开发板USB，与PC机进行通信，并在显示字符。 目录说明: 工程在\project文件夹里面 源文件和管脚分配在\rtl文件夹里面 下载文件在\download文件夹里面,.mcs为PROM模式下载文件,.bit为JTAG调试下载文件。-Procedure Note: In this experiment, control development board USB, and PC, to communicate, and display char
sdram
- 程序说明: 本次实验控制开发板上面的SDRAM完成读写功能。 先向SDRAM里面写数据，然后再将数据读出来做比较，如果不匹配就通过LED变亮显示出来，如果一致，LED就不亮。 part1是使用Modelsim仿真的工程 part2是在开发斑上面验证的工程 目录说明: part1: part1_32是4m32SDRAM的仿真工程 part1_16是4m16SDRAM的仿真工程 \model文件夹里面是仿真模型 \rtl文件夹里面是源文件 \sim文
lab5_2
- this a vhdl project on 4-bit multiplier with carry look ahead implementation and 8-bit result -this is a vhdl project on 4-bit multiplier with carry look ahead implementation and 8-bit result
CIC_Moore
- It is a complete project of Cache Interface Controller programmed in VHDL using the logic of Moore State Machine
project
- convolutional encoder vhdl code, rate 1/2, k=3
read_solomon
- This project implements a parameterized Reed Solomon decoder for use in OFDM wireless systems.
PS2andRS232
- 基于Verilog语言PS2接口和RS232接口的实现 有文档说明,工程实例.可用来学习Verilog语言.-Based on Verilog Language PS2 interface and RS232 interface implementation are documented, project examples. Can be used to learn the Verilog language.
bluespec-80211atransmitter_latest.tar
- This package implements a parameterized baseband hardware logic for an 802.11a Transmitter. This project has since been subsumed by the OFDM baseband project which can also be found on opencores.-This package implements a parameterized baseband har
ds18b20_verilog
- 用verilog语言编写，实现DS18B20测量温度的程序，包括整个工程文件。-Using verilog language, achieve DS18B20 temperature measurement procedures, and including the project file.
DataAcquisitionCard
- usb2.0的高速数据采集卡ISE工程包，包括了完整的设计-usb2.0 high-speed data acquisition card ISE project package, including a complete design
speed_measure_on_7_segment
- Period method of frequency measuring (change constant to speed measure). DE2 Board Quartus project. Input signal on GPIO, result on 7seg, start/stop with key[0].
ZHILIUDIANJI
- EDA直流电机项目设计，能实现加速 减速 方向控制。-EDA DC project design, to achieve directional control of accelerating and decelerating.
DE2_70_AUDIO
- 是用VERILOG HDL和NIOS II C/C++ 编的DE2-70板子的音频编解码芯片的使用工程-Is VERILOG HDL and NIOS II C/C++ code of the DE2-70 board in the audio codec chip, the use of project
crc
- crc project by vhdl -crc project by vhdl ..............
cpu
- 设计以及基本的CPU，至少包括四个基本单元，控制单元，内部寄存器，ALU和指令集-The purpose of this project is to design a simple CPU (Central Processing Unit). This CPU has basic instruction set, and we will utilize its instruction set to generate a very simple program to verify its perf
UART_prj_ViHDL
- vhdl project at sbu uni in iran uart