搜索资源列表
CORRECE
- 使用MATLAB完成CDMA系统的相关接收机，其中哈达码矩阵为128阶，仿真比特信噪比为-10DB
rake
- 使用matlab实现cdma 系统的rake接收机，比较最大比合并，等增益合并和选择性合并接收算法的性能
WIRELESS
- This file contains source code for DS-CDMA transciver using VHDL. it is having two source codes one is for Transmitter and another is for reciever programme.
AMBA
- AMBA总线结构的VHDL代码 AMBA总线VHDL代码范例-AMBA BUS example
deinterleave
- CDMA.1X中，解交织的FPGA实现，程序基于VHDL编写，在XILINX开发板实现。-CDMA.1X, the solution of interwoven FPGA implementation, the program prepared based on VHDL, in the XILINX development board to achieve.
CDMA_MULT3_ise9migration
- CDMA Source code and documentation
CDMA
- CDMA source code and documentation best code
cdma
- vhdl code for flip-flop,lfsr
17_walsh_128
- walsh码，在CDMA系统中经常使用到的方法，在quartusII环境下实现的。-walsh code in the CDMA system, the method often used in quartusII environment to achieve.
ViterbiFPGA
- 探讨了CDMA 数字移动通信中的差错控制问题, 研究用约束度K = 9 的卷积编码 和最大似然V iterbi 译码的差错控制方案. 在V iterbi 译码算法中, 提出了原位运算度量、保 存路径转移过程和循环存取幸存路径等方法, 能有效地减少存储量、降低功耗, 使得K = 9 的V iterbi 译码算法可在以单片XC4010 FPGA 为主的器件上实现, 其性能指标符合CD2 MA 数字移动通信IS 95 标准要求. 文中给出了实测的算法性能, 讨论了FPGA 具体实现
bpsk_spread_spectrum_modulator_demodulator
- code for bpsk spread spectrum modulator used in cdma -code for bpsk spread spectrum modulator used in cdma ..
spreadcdma
- spread spectrum cdma materials
is95receiver
- CDMA IS-95 接收机基带处理仿真 对扩频原理学习有所帮助-CDMA IS-95 receiver
conv
- 在编码器复杂度相同的情况下，卷积码的性能优于分组码，因此卷积码几乎被应用在所有无线通信的标准之中，如GSM， IS95和CDMA 2000 的标准中。-Complexity in the encoder the same circumstances, convolutional codes perform better than block codes, the convolutional code is used in almost all wireless communication sta
cdma
- 使用verilog在QII系统中开发的一个简单的4用户CDMA系统。-In QII system using verilog developed a simple four-user CDMA system.
OFDM-learning-based-on-xilinxFPGA
- 用FPGA设计了CDMA中OFDM的通信过程，还包括了扩频-FPGA implentatiom for CDMA-OFDM
CDMA-REsult-wave-form
- CDMA result waveform
CDMA_DECODING
- CDMA encoding using VHDL
god
- This paper presents a novel robust number theoretic transform called inverse Gray Robust Symmetrical Number System (IGRSNS) and proposes its application for CDMA systems. The transceiver structure for three moduli IGRSNS-CDMA with one redunda
cdma
- codes for fpga implementation of cdma system using verilog hdl.