搜索资源列表
FPGAAD9280LED.rar
- 用FPGA cyclone控制AD9280后，将结果用LED的明暗来表示，8位数据分两次显示。,AD9280 control using FPGAcyclone will be the result of the use of LED lighting to show that, in two 8-bit data display.
FPGA_Clk
- 基于Cyclone EP1C6240C8 FPGA的时钟产生模块。主要用于为FPGA系统其他模块产生时钟信号。采用verilog编写。 使用计时器的方式产生时钟波形。 提供对于FPGA时钟的偶数分频、奇数分频、始终脉冲宽度等功能。-Based on Cyclone EP1C6240C8 FPGA' s clock generator module. Is mainly used for the FPGA system clock signal generated in other
DE2_TV_New_v1
- build a tv box on fpga cyclone 2
CYCLONEIIEP2C35
- DE2开发板的原理图，TERASIC CYCLONE II EP2C35 Development & Education BOARD-DE2 development board schematics, TERASIC CYCLONE II EP2C35 Development & Education BOARD
CycloneDeviceHandbookVolume
- 这是一个关于FPGA cyclone 的数据手册。-This is a FPGA cyclone on the data sheet.
CyclonePLL
- Cyclone™ FPGA具有锁相环（PLL）和全局时钟网络，提供完整的时钟管理方案。Cyclone PLL具有时钟倍频和分频、相位偏移、可编程占空比和外部时钟输出，进行系统级的时钟管理和偏移控制。Altera® Quartus® II软件无需任何外部器件，就可以启用Cyclone PLL和相关功能。本文将介绍如何设计和使用Cyclone PLL功能。 PLL常用于同步内部器件时钟和外部时钟，使内部工作的时钟频率比外部时钟更高，时钟延迟和时钟偏移最小，减小或调整时钟
EP3C25
- Cyclone® III EP3C25的资料-Cyclone 庐 III EP3C25 information
fpga_sram
- Altera cyclone ep1c6对sram idt71系列的读写时序控制-Altera cyclone ep1c6 of sram idt71 series of read and write timing control
hex2rom_0241_Win32
- This SPI-mode SD Card controller is a free SOPC Builder component that can be used in any SOPC Builder system. The included example design runs on the Nios II Embedded Evaluation Kit, Cyclone III edition (NEEK).-This SPI-mode SD Card controller is a
FPGACycloneIIEP2C5EP2C8pingluji
- 基FPGA Cyclone II_EP2C5 EP2C8的频率计-epga cycklone
AlteraCycloneIIFPGAStarterBoard
- Altera Cyclone II FPGA Starter Board原理图-Altera Cyclone II FPGA Starter Board Schematic
I2C
- I2C主机端模块 具有avalon-MT总线接口 可挂载在Altera soc系统之上 使NiosII处理器具备I2C通信能力 模块由Verilog HDL编写 并经Cyclone II FPGA测试-I2C master modul which has a avalon-MT interface that can be attached to Altera SOC system. It provides NiosII I2C communication capability . This mo
Cyclone
- 时钟同步主要用在产生10NHZ时钟已近IRIG-B-Clock synchronization
FFTVHDl
- 基于FPGA的fft实现 摘要：本系统基于Altera Cyclone II 系列FPGA嵌入高性能的嵌入式IP核(Nios)处理器软核，代替传统DSP芯片或高性能单片机，实现了基于FFT的音频信号分析。-FPGA-based realization of the fft Abstract: This system is based on Altera Cyclone II family of embedded high-performance FPGA embedded IP core
pljtest
- CYCLONE II 内嵌8051IP核实现等精度频率计-CYCLONE II embedded nuclear 8051IP achieve precision frequency meter, etc.
TrackingPresentation_jon
- presentation a low cost video tracking algorithm implemented on an Altera DE2 board with Cyclone II processor. System uses a VGA controller and several SG-DMA s-presentation on a low cost video tracking algorithm implemented on an Altera DE2 board wi
Cyclone_Series_Device_Thermal_Resistance
- cyclone系列FPGA的串行设备阻抗匹配设计指南-cyclone series FPGA Design Guide impedance matching of serial devices
sopcfpga
- 一个Altera Cyclone PCI开发板的配套样板源代码-Sample source code for An Altera Cyclone PCI development board
cyclone_handbook
- Altera 公司生产的FPGA系列中的低端高性能产品cyclone一代用户手册,这个也能从Altera官方网站上下载。-Altera' s FPGA series production of low-end high-performance products cyclone generation, user manuals, this is also downloaded from the Altera website.
Cyclone-FPGA-Family-Data-Sheet
- Cyclone FPGA Family 数据手册。讲述altera公司的FPGA的相关器件。主要用于选型。-Cyclone FPGA Family Data Sheet. Altera about the company' s FPGA-related devices. Mainly used for selection.