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DaFilter
- /* This program generates the DApkg.vhd file that is used to define * the DA filter core and gives its parameters and the contents of the * Distributed Arithmetic Look-up-table \"DALUT\" according to the DA algorithm-/ * This program generate
FIRde-verilog-shixian
- 有符号DA算法的FIR滤波器的Verilog实现-A symbol of the algorithm of DA FIR filters Verilog realized
16_FIR
- 16阶FIR滤波器--本设计用VERILOG HDL语言串行DA算法实现16阶有限频率响应滤波器！-16-order FIR filter- this design language VERILOG HDL serial DA algorithm limited frequency response of 16-order filter!
DA_fir
- 基于分布式算法的FIR滤波器设计及FPGA实现-Distributed algorithm based on FIR filter design and FPGA realization of
verilog.DA.FIR..
- 用verilog写的16阶串行DA算法FIR滤波器-Verilog written by 16-order FIR filter serial DA algorithm
ADPCM
- APPCM算法和AD/DA芯片驱动在CPLD中的实现，已在实际硬件中测试OK，quartus2环境-APPCM algorithm and AD/DA chip in the drive to achieve in the CPLD has been tested in actual hardware OK, quartus2 environment
memtest
- 在数字系统中，一般存在多个芯片，利用不同的特点用于实现不同的功能，一般都包含CPU,FPGA,AD,DA,memory，ASSP（专用标准模块）,ASIC等。CPU用于进行智能控制，FPGA进行硬件算法处理和多设备接口，AD进行模数转换，DA进行数模转换，memory存储临时数据。因此，FPGA如何与其他芯片进行通讯是重要的设计内容。数据输入，数据输出，双向通讯，指令传递，地址管理，不同时钟的异步通讯问题等等都需要处理。最基本的MEMORY如SRAM(128KX8bbit静态存储器628128)
da
- FIR滤波器利用串行DA算法实现16阶的，直接可用 ，用VHDL编程-Serial DA FIR filter algorithm using 16 bands, directly available, VHDL programming
fir_da_test
- 用QUARTUS软件，用DA算法实现一个32阶的FIR滤波器-QUARTUS software used with the DA algorithm to achieve a 32-order FIR filter
implementation-of-srrc-filter
- 这是基于国标DMB_TH中发端升余弦滚降滤波器中FPGA实现，包括滤波器的理论，DA算法和多相分布算法-This is based on GB DMB_TH the originator Raised Cosine Filter in FPGA, including the filter theory, DA algorithm and multi-phase distribution algorithm
DA-FIR
- 采用DA算法实现FIR滤波器的设计实验原理建模仿真-DA algorithm using FIR filter design principles of modeling and simulation experiments
DA-FIR-FPGA
- 详细介绍了分布式算法FIR的设计，对于用FPGA实现FIR的设计具有指导意义。来自华中科大。-Detailed design of a distributed algorithm FIR, FPGA implementation for the FIR design with a guide. From HUST.
DA_FIR_VERILOG
- 基于DA算法的FIR滤波器的verilog实现-DA-based FIR filter algorithm to achieve the verilog
da_filter
- DA，分布式算法的FILTER滤波器的设计，verilog设计与实现-DA, distributed algorithm of FILTER FILTER design, verilog design and implementation
DA_64_FIR(TABLE)
- 用DA算法实现的64阶FIR滤波器，在QUARTUS下调试通过-DA algorithm achieved 64 order FIR filter
CoreFIR_RTL-3.0
- actelIP核 的fircore Core Generator – Executable File Outputs Run-Time Library (RTL) Code and Testbench Based on Input Parameters – Self-Checking – Executable Tests Generated Output against Algorithm • Distributed Arithmetic (DA) Algori