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ethernet_tri_mode_rtl.tar
- 以太网控制器verilog，含有mac,mii接口
smii-to-mii
- SMII 到 MII 转换的VHDL代码
目前以太网PHY芯片是通过总线MDC/MDIO
- 目前以太网PHY芯片是通过总线MDC/MDIO，但是基本上是通过MAC芯片直接管理的，本代码实现了通过FPGA管理PHY。即由FPGA完成MII管理,At present, Ethernet PHY chip through the bus MDC/MDIO, but basically through the direct management of MAC chip, the code through the FPGA implementation management PHY. FPGA
ETH
- 该系统通过顶层模块，调用4底层模块实现。4大模块底层模块为：cpu模块、发送模块、接收模块、mii模块-The system top-level module, called the bottom module 4. 4 large modules underlying module: cpu modules, transmit modules, receiver modules, mii module
48_4.12
- 网络通信中的MII接口 通常将4位nibble数据送出，此程序将4位数据组合成8位数据并行输出（8比特==1个字节）。。完全可用 同时包含84转换-The MII network interface usually sent four nibble data, this procedure will be 4-bit data into 8-bit parallel output data (8 bits == 1 byte). . Completely available at the
MII
- 这个很简单，但是很全面的网路资料，大家快看看哦。-This is simple, but very comprehensive network of information, we quickly take a look oh.
MII_timing
- 用FPGA实现MII的数据传送时序控制,方法简单实用，设计及其精巧-implementation of MII data transmission’s timing control
ethernet_controller_Verilog
- 以太网控制器源码，verilog语言,包含MAC、MII接口-Ethernet controller ,include MAC and MII interfaces ,by verilog
smii_latest.tar
- SMII接口的mac控制器，通过测试。使用verilog语言！-The Serial Media Independent Interface, SMMI, is a low pin count version of the MII normally used between ethernet MAC and PHY. The Serial Media Independent Interface (SMII) is designed to satisfy the following r
VHDL_MII_MAC
- 百兆以太网接口，verilog HDL,希望能对你有帮助。-verilog HDL， MII，ethernet，hope helpful to you。
MII
- 以太网MII芯片配置接口的VHDL设计，配置PHY芯片的模块设计-Ethernet MII chip configuration interface VHDL design, configuration PHY chip module design
eth
- 用数字逻辑语言描述以太网，百兆以太网MAC和MII的verilog源码-With digital logic language to describe Ethernet
MAC_TxScheduler
- Ethernet MAC-MII interface of Transmit
MII_RxMAC
- Ethernet MAC-MII interface of Receive
code
- 把MII接口接收的4比特并行数据转换为8比特的并行数据输出。-convert 4 bit data to 8 bit data
com1600template_002f
- VHDL source code of 1600 M-VHDL source code of 1600 MII
以太网控制器Verilog源码(含有MAC,MII接口)
- 以太网控制器Verilog源码(含有MAC,MII接口)(Ethernet controller Verilog source code (including MAC, MII interface))
1227
- Really is a good program, About ultrasonic parking radar ranging, ICA (Principal Component Analysis) algorithm and procedures.
fui-V0.7
- Achieve a grayscale image and further control for video surveillance, DC-DC power single-part set-loop control, Achieve serial data acquisition.
mii_mac
- mii mac tx and rx，以太网mii接口收发(mii mac tx and rx Ethernet mii interface)