The objective of this project is to create a driver for a camera module (we used the OV7620). After taking the image with the camera, the driver will store into the external asynchronous RAM, and then send it to the computer through a serial cable

两线式SCCB总线FPGA驱动，verilog语言编写，可用于配置OV系列摄像头-Two-wire bus SCCB FPGA drive, verilog language, can be used to configure the OV series camera

ov7670摄像头捕获代码，VHDL，稍加修改即可完成OV系列其他摄像头的捕获操作-ov7670 camera to capture the code, VHDL, slightly modified to complete the OV series of other camera capture operation

ov7670的控制器代码，VHDL，稍加修改即可完成ov系列的摄像头的控制-control ov7670 controller code, VHDL, slightly modified to complete ov series cameras