搜索资源列表
RS232串口通信协议
- RS232串口通信协议，verilog实现，通过FPGA完全调通。,RS232 serial communication protocol, verilog achieved entirely through the FPGA transfer pass.
udp
- VHDL implementation of UDP protocol
Verilog_UDP
- 辛辛苦苦找到的UDP的资料，在verilog中UDP指的是用户定义的原语。比如说大家有时候会见到“primitive...table...endtable...endendprimitive”这样的代码段，在书上只能找到大概的解释。到网上查的话又老是跟TCP/IP的UDP冲突。所以特地搜集到了这个东西，希望能帮助大家解决“用户原语”相关的问题。-UDP hard to find the information in verilog in the UDP refers to the user-de
EthernetUDP
- ethernet mac core.this is the etherenet udp application
s3en_udp
- 基于spartan3e开发板嵌入式EDK开发的UDP协议网口开发程序-EDK embedded development board based on spartan3e UDP protocol developed network port development program
HardwareUDP
- Hardware UDP, implementation of UDP based on Altera DE2 using Verilog
UDP_receiver
- this is udp receiver application for sending packets through the ethernet
NET2
- UDP on De2 Board, Transmit to PC or other Board
nios_net716UDP_nic
- 在Altera nios上用rtl8019实现UDP通信-altera nios rtl8019 udp
auk_udpipmac-v3.3.0.tar
- The Altera(R) UDP/IP function implements a hardware solution for the transmission and reception of UDP/IP encapsulated network traffic.
ADD6
- 此源代码是基于Verilog语言的多种方式实现的4 选 1 MUX、多种方式实现的4 选 2 MUX 、多种方式实现的1 位半加器 、多种方式实现的1 位全加器、种方式实现的 4 位全加器 、多种方式实现的输出 UDP 元件、两个时钟信号 、选择器 和各种仿真的源代码。-This source code is based on the Verilog language, multiple ways to achieve the 4 S 1 MUX, a variety of ways to ac
UDP_Core
- 本人用verilog编写的UDP协议，经测试可用。-I am prepared to use verilog UDP protocol, the test is available.
UDP
- 这是用Verilog HDL编写的程序 利用UDP方法实现四位加法器-This is written in Verilog HDL programs Use UDP method four adder
UDP
- UDP of Dff and mux. COntains test bench also
基于FPGA实时视频图像网络传输系统设计
- 使用FPGA实现以太网的传输，通信方式为UDP(Using FPGA to achieve Ethernet transmission, communication mode is UDP)
CH14_RGMII_UDP_TEST
- 用xilinx的SPARTAN6 实现的UDP，可通过PC机网络抓包工具进行发送和接收，增加了网络视频传输的接口，具有很好的参考价值(With the Xilinx implementation of the SPARTAN6 UDP, can be sent and received through PC network capture tools, increase the network video transmission interface, has a good reference
imports
- 用FPGA实现UDP/IP协议，对于想用FPGA实现UDP/IP协议的可以看一看(Implementation of UDP/IP protocol with FPGA)
14_ethernet_test
- Xilinx UDP 以太网通信测试，已测试可以直接用(Xilinx UDP Ethernet communication test has been tested and can be directly used.)
labview tcp udp usb通讯源码
- 基于虚拟仪器语言labview的网络通讯tcp udp，串口通讯 usb的源码
FPGA RMII接口实现UDP
- Verilog实现RMII接口UDP网络传输，源代码