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实现USB接口功能的VHDL和verilog完整源代码
- 实现USB接口功能的VHDL和verilog完整源代码,Implementation USB interface functions of the VHDL and Verilog source code integrity
USB.rar
- 用VHDL实现的USB IP核,大家可以参考下,Use VHDL to achieve USB IP core, we can refer to the following
USB.rar
- USB接口的测试程序,Verilog语言编写 ,USB
Usb
- 基于FPGA的驱动设计,使得用户的USB驱动在此完美实现。-FPGA-based drive design makes the user' s USB drive in this work perfectly.
USB
- USB源代码,基于VHDL语言编写,在QuartusII上面已验证其功能-USB source code, based on the VHDL language, verified in QuartusII above its function
usb-driver
- Xilinx USB下载线 Linux驱动,支持原来并口线,以及现在USB线,最重要的是支持基于FT2232的简易USB JTAG,FT2232不仅可以通过OpenOCD调ARM,还可以下载Xilinx FPGA了!-linux driver of Xilinx USB Platform cable, support xilinx usb cable and parallel cable, in addition, it support usb jtag based on FT2232!
USB
- USB通信协议的硬件描述语言代码,用于FPGA的总线接口控制器开发-USB communication protocol of the hardware descr iption language code for the FPGA bus interface controller development
usb-blaster
- quartus多种USB-bletera 自制下载线!
USB
- FPGA数字电子系统设计与开发实例导航--USB-FPGA digital electronic systems design and development of navigation example- USB
USB
- USB的VHDL实现源码(使用VHDL硬件描述语言,通过Altera QuartusII 开发)-USB to achieve the VHDL source code (using VHDL hardware descr iption language, through the development of Altera QuartusII)
USB
- Verilog实现的USB程序,用ISE打开工程文件即可-Verilog implementation USB program, open the project file with the ISE can be
USB
- 用VHDL编写实现的USB接口控制器源码,自带testbench,解压后用ISE打开工程文件即可。-Prepared with the VHDL source code to achieve the USB interface controller, bring their own testbench, after decompression project file can be opened with the ISE.
USB
- USB口的设计,包括驱动程序的设计,以及软件的安装演示,软件的介绍,以及工作模式-USB port design, including the driver design, and installation of software, presentation, software presentation, and working models
usb
- 程序说明: 本次实验控制开发板USB,与PC机进行通信,并在显示字符。 目录说明: 工程在\project文件夹里面 源文件和管脚分配在\rtl文件夹里面 下载文件在\download文件夹里面,.mcs为PROM模式下载文件,.bit为JTAG调试下载文件。-Procedure Note: In this experiment, control development board USB, and PC, to communicate, and display char
usb
- USB完整代码 包括vhdl和verilog两种-usb ip core
USB-blaster(fpga)
- USB-blaster(fpga下载器) 下载器 供大家使用-USB-blaster (fpga Downloader) downloader for people to use
Altera-USB-Blaster-sch
- 制作Altera USB-Blaster的原理图-Production Altera USB-Blaster Schematic
The-USB-2.0-Physical-Layer_-Standard-and-Implemen
- THIS DOCUMENT IS USB 2.0 PHYSICAL LAYER STANDARD AND IMPLEMENTATION BY GERRIT W DEN BESTON ...VERY USEFUL WHILE IAM DOING PHYSICAL LAYER IMPLEMNTATION OF USB
USB
- USB CY7C68013 键盘发送 VHDL FPGA-USB CY7C68013 keypad VHDL FPGA
USB
- USB控制器的VERILOG工程文件,工程为ISE的,可以编译通过,压箱底的东西了-USB controller VERILOG project file, works for the ISE, you can compile, pressure bottom of things