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CORDIC
- ：CORDIC算法将复杂的算术运算转化为简单的加法和移位操作，然后逐次逼近结果。这种方法很好的兼顾了精度、速度和硬件复杂度，它与VLSI技术的结合对DSP算法的硬件实现具有极大的意义，因而在数字信号处理领域得到了广泛应用。本文首先简要介绍了CORDIC算法的原理，然后详细描述了双模式（旋转/向量）CORDIC算法的预处理和后处理，并且基于FPGA实现了流水线双模CORDIC算法。-By converting complex arithmetic into simple operations su
fir_parall
- 基于verilog的fir滤波器设计，用的并行结构。在前面基础上加入四级流水（加法器，并行乘法器，乘法结果相加两级），通过验证。-Verilog-based design of fir filter using the parallel architecture. In front of the basis of adding four water (adder, parallel multiplier, multiply the result of the sum of two), throu
singt
- 用VHDL语言描述的用锁存器，加法计数器，ROM存储器构成的RTL图-VHDL language used to describe the use of latches, adding counters, ROM memory map consisting of RTL
anjian
- 最基本的vhdl程序，能实现一小时的计时，且加入按键功能-Vhdl basic procedures, to achieve a one-hour time, and by adding key features
mul4
- 分析二进制乘法中计算步骤（多少次加法，何时进行），实现一个有限状态机，执行乘法运算。-Analysis of binary multiplication in the calculation of step (adding the number of times, when it will be), the realization of a finite state machine, the implementation of multiplication.
mbtutorial
- This tutorial guides you through the process of using Xilinx Embedded Development Kit (EDK) software tools, in which this tutorial will use the Xilinx Platform Studio (XPS) tool to create a simple processor system and the process of adding a cust
69491706fp_add_sub
- verilog code for floating point adding
CHICAGO5Manual
- 高科技的发展使芯片设计不再是半导体工业的领域，现场可编程逻辑阵列（FPGA）的出现使通过软件来快速实现芯片设计成为可能。本系统是广泛面向全球的工程技术人员和大专院校学生，使您能够在最短的时间内掌握FPGA的应用与VHDL/AHDL/Verilog HDL这一电子逻辑设计利器，迅速的加入高级电子设计人才行列。-The development of high-tech chip design is no longer the field of semiconductor industry, fiel
paobiao
- 基于Verilog HDL的完整数字跑表工程，在试验机台上运行验证通过了的。 用8位7段数码管分别显示微妙，秒，分。 有开始，暂停，复位功能。 学习VerilogHDL的经典例子，添加了显示功能。-Complete Verilog HDL-based digital stopwatch works in the test machine is running verify pass the platform. With 8-bit 7-segment digital tube sho
booth_m4_v
- The algorithm was invented by Andrew Donald Booth in 1951 while doing research on crystallography at Birkbeck College in Bloomsbury, London. Booth used desk calculators that were faster at shifting than adding and created the algorithm to increase th
arm_move
- An effort has been made to design a robot, which loads and unloads an object to the station depending on the request. The sensor connected to the robot will sense the request and initiate the correct sequence of operation. The robot under design has
multi8x8
- 用VHDL设计应用移位相加原理的8位乘法器，使用QuartusII仿真验证。-VHDL design applications with the principle of adding 8-bit shift multiplier, using QuartusII simulation.
lab3_adding_ip
- xilinx embeded添加ip的源程序,包括工程文件-xilinx embeded adding ip
8multipler
- 用VHDL实现8位移位相加乘法器，从被乘数的最低位开始，若为1，则乘数左移后与上次的和相加；若为0，左移后以全0相加，直至被乘数的最高位。-VHDL 8-bit shift by adding the multiplier to achieve, starting from the lowest multiplicand, if 1, then left after the multiplier and add the last if 0, left after adding all 0, u
ddr_100Mhz_2011.03.12
- 这个工程是用xilinx的MIG生成的对于spartan 3E的实验板的ddr的控制器，我已经能够在上面修改之后加入自己的思想，包括两个dcm的模块。-This project is the MIG generated by xilinx spartan 3E development board for the ddr controller, I have been able to modify the above by adding his own ideas, including the t
Add_4bits
- a code adding 4 bits
Add_Nbits
- a code adding N bits
multiply_shift_add
- 基于移位相加运算的乘法器设计，multiply_shift_add中包含了完整的设计工程文件，可在Xilinx ISE中运行-Adding operation based on shift on time-multiplier design, multiply_shift_add contains the complete design engineering documents, Xilinx ISE in running
AN125
- AMBA Application Note: AN125 - Adding additional processors to the PB926EJ-S using Core Tiles. -AMBA Application Note: AN125- Adding additional processors to the PB926EJ-S using Core Tiles. This example design enables you to use an ARM7TDMI, AR
Adding-counter
- 1、 了解二进制计数器的工作原理。 2、 进一步熟悉QUARTUSII软件的使用方法和VHDL输入。 3、 时钟在编程过程中的作用。 - Including synchronous and asynchronous clear enabled adding counter