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vhdlad
- 基于VHDL的高速串行AD转换器控制设计与实现-VHDL-based high-speed serial AD converter control design and implementation
xapp283
- YUV到RGB的色彩空间转换器(VHDL,Verilog and doc)-Color Space Converter: Y’CrCb to R’G’B’
DDC_CIC
- 用CIC 和 FIR Filters设计的数字下变频器，DSP Builder6.1版工程文件-Using CIC and FIR Filters Design of Digital Down Converter, DSP Builder6.1 version of project file
bin2bcd
- Binary to BCD converter
vhd2vl
- VHDL to verilog converter
FIR_TEST
- 应用matlab 软件设计了下变频器中的CIC、HB、FIR滤波器等核心模块，并将各模块融为一体从软件实现的角度完成了对系统的搭建和功能仿真。-About such key algorithms as CIC, HB, FIR of each module in down- conversion, discussion, abstraction and summarization are given in this paper. Using the MATLAB software, we des
tes_amp_80_0314
- 基于dsp builder的数字下变频器，IP核做的-digital down converter,degigned in matlab
analogue-digi-ana-converter
- design and implementation of a format conversion system on the Altera NIOS board(QUARTUS) which reads an analogue input, converts it into digital data, and then does the reverse conversion back into analogue format. This will be done by taking an ana
Binary_to_BCD_Converter
- General Binary-to-BCD Converter The linked code is a general binary-to-BCD Verilog module, and I have personally tested the code.
dac
- Digital to Analog Converter code VHDL
converter(D-B)
- 用移位快速实现10进制转2进制，无需除法器-quick converter
binary to gray and gray to binary code converter
- this project is based on 4bit binary to gray and gray to binary code converter using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be
DSPHBControl
- DSP Example Code for programming an Hybrid AC/DC converter-DSP Example Code for programming an Hybrid AC/DC converter
ADC
- Analog to Digital converter
Binary.code.Gray.code.converter
- 二进制码格雷码转换器 进行二进制码格雷码转换，vhdl，QuartusⅡ-Binary code Gray code converter
digital-quadrature-down-converter
- 基于FPGA的数字正交下变频器设计,在ALTERA的DE2开发板上设计一个多相滤波结构数字正交变换器。其中多相滤波模块是最关键模块，该模块将64阶滤波器的系数分成奇偶两路，并通过VHDL常数的方式存储在模块内部。这些常数是通过在MATLAB中调用FDATool，根据滤波器的参数要求来生成的。这些浮点格式的滤波器系数还需要在MATLAB中计算成二进制补码的形式，才可以存储在模块中。-FPGA-based digital quadrature down-converter design, ALTER
VHDL_PWM
- 基于VHDL的直流电机的PWM控制程序 PWM型DC／DC变换器控制方法-VHDL-based DC motor PWM control procedures PWM type DC/DC converter control
Analog-to-digital-converter
- 模数转化器，64位双精度的模拟输入值，16位数字输出-Analog to digital converter, 64-bit double-precision analog inputs, 16 digital outputs
And-serial-converter
- 实现1024位并行输入，32位串行输出的verilog HDL程序 并带有其测试程序-Achieve 1024 parallel input, 32-bit serial output verilog HDL program and with the test procedures and serial converter
AD-converter-analog-simulation--
- AD转换器的模拟信号仿真，写控制字, 再通过通信寄存器对设置寄存器、时钟寄存器进行访问。分别写控制字05H和40H、FFH,表示AD晶振2. 4576MHz, 更新频率60次/ s, 自校准模式, 差分输入。-AD converter analog simulation Write control word, again through the communication registers on Settings registers, clock registers visit. Write