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基于FPGA的直接数字频率合成器（DDS）设计
- 基于FPGA的直接数字频率合成器（DDS）设计 （源程序）,FPGA-based direct digital synthesizer (DDS) design (source code)
DDS.rar
- FPGA控制AD9854的源文件，verilog，附有简单文档。,FPGA to control the AD9854 source file, verilog, with a simple document.
dds
- verilog 硬件语言实现DDS，使用ise11.1和modelsim se6.5仿真测试-verilog hardware language DDS, using the simulation test ise11.1 and modelsim se6.5
dds
- 基于FPGA的DDS设计，本程序采用verilog HDL语言编写，使用DDS+Pll倍频-The DDS-based FPGA design, the procedures used verilog HDL language, the use of DDS+ Pll frequency
FPGA-DDS
- 在FPGA内，以查表方式实现频率直接合成器（DDS）功能。verilog源代码-In the FPGA in order to achieve the look-up table means the direct synthesizer frequency (DDS) feature. verilog source code
dds-design
- fpga实现dds，实现任意波形输出信，设计代码verilog-dds fpga realization
AM
- FPGA内AM调制工程。内带调制波、载波生成。关键词：FPGA verilog AM DDS-AM modulation works within the FPGA. Within the band modulation wave generated carrier. Key words: FPGA verilog AM DDS
DDS
- 基于Verilog的dds设计，已经经过调试，可直接使用-Dds of Verilog-based design, has been testing can be used directly
dds
- dds 驱动 ad9851 fpga vhdl-ad9851 dds ad9851 fpga vhdl
DDSVerilog
- DDS Verilog 代码。包含英文文档说明-DDS Verilog code. Containing the English documentation
DDS
- 同时用verilog 语言编写dds原代码用于生成正余弦波，并在FPGA平台进行验证-described dds direct digital frequency synthesis of the basic tenets addition to the use of verilog prepared dds source used to produce sine, and FPGA development platform for verification
MyDDS
- 利用查找表法编写的DDS的verilog程序，节省了利用IP核实现需要的资源，软件为ISE，-Prepared using look-up table method of verilog DDS program, save the use of IP core implementation requires resources, software for the ISE,
DDS_Set
- AD9852，DDS芯片接收数据逻辑。（Verilog语言）-AD9852, DDS chips receive data logic. (Verilog language)
DDS
- 在FPGA中实现频率源的设计,使用硬件描述语言加以实现。-design DDS with verilog language
DDS
- 关于用FPGA制作的DDS源代码。用的是verilog语言，用的是xlinx的软件-Produced with the DDS on FPGA source code. Using verilog language, using xlinx software
DDS-in-Verilog
- Verilog编写基于FPGA的DDS实现，内含源代码，希望对大家有所帮助。-DDS in Verilog FPGA-based implementation, including source code, we want to help.
FPGA-DDS-algorithm
- 采用FPGA的DDS算法Verilog程序的实现-FPGA DDS algorithm Verilog program implementation
DDS
- Verilog HDL实现FPGA的DDS功能，含有实验原理与代码程序-FPGA Verilog HDL realize the DDS function, principles and codes containing experimental procedures
dds(1)
- 基于DDS的信号发生器设计。DDS,FPGA,Verilog。(Design of signal generator based on DDS.DDS,FPGA,Verilog.)
DDS波形发生器
- DDS波形生成器verilog语言书写（FPGA型号cy4以上）(DDS generate verilog)